74LVTH16374 Datasheet

  • 74LVTH16374

  • Low Voltage 16-Bit D-Type Flip-Flop

  • 96.62KB

  • Fairchild

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74LVT16374 鈥?74LVTH16374 Low Voltage 16-Bit D-Type Flip-Flop with 3-STATE Outputs
January 1999
Revised June 2005
74LVT16374 鈥?74LVTH16374
Low Voltage 16-Bit D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVT16374 and LVTH16374 contain sixteen non-invert-
ing D-type flip-flops with 3-STATE outputs and is intended
for bus oriented applications. The device is byte controlled.
A buffered clock (CP) and Output Enable (OE) are com-
mon to each byte and can be shorted together for full 16-bit
operation.
The LVTH16374 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These flip-flops are designed for low-voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVT16374 and LVTH16374
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining a low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16374),
also available without bushold feature (74LVT16374)
s
Live insertion/extraction permitted
s
Power Up/Power Down high impedance provides
glitch-free bus loading
s
Outputs source/sink

32 mA/

64 mA
s
Functionally compatible with the 74 series 16374
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device model
!
1000V
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Order Number
74LVT16374G
(Note 1)(Note 2)
74LVT16374MEA
(Note 2)
74LVT16374MTD
(Note 2)
74LVTH16374G
(Note 1)(Note 2)
74LVTH16374MEA
(Note 2)
74LVTH16374MTD
(Note 2)
Package Number
BGA54A
(Preliminary)
MS48A
MTD48
BGA54A
MS48A
MTD48
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Note 1:
Ordering code 鈥淕鈥?indicates Trays.
Note 2:
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
漏 2005 Fairchild Semiconductor Corporation
DS012022
www.fairchildsemi.com

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