MSC8101 Datasheet

  • MSC8101

  • Networking Digital Signal Processor

  • 1873.07KB

  • Motorola

扫码查看芯片数据手册

上传产品规格书

PDF预览

Freescale Semiconductor
Technical Data
MSC8101
Rev. 16, 11/2004
MSC8101
Network Digital Signal Processor
CPM
MCC / UART / HDLC / Transparent /
Ethernet / Fast Ethernet / ATM / SCC
3
FCC
2
MCC
4
SCC
2
SMC
SPI
I2C
UTOPIA
Interface
MII
Interrupt
Controller
Timers
Parallel I/O
Baud Rate
Generators
Dual Ported
RAM
Bridge
2
SDMA
RISC
64-bit Local Bus
MEMC
DMA
Engine
SIU
64-bit System Bus
MEMC
PIT
System Protection
Reset Control
Clock Control
SIC_EXT
Interrupts
SIC
64/32-bit
System
Bus
TDMs
{
鈥⑩€?/div>
鈥?/div>
Other
Peripherals
Extended Core
Program
Sequencer
SC140
Core
JTAG
Address
Register
File
Address
ALU
EOnCE鈩?/div>
Clock/PLL
Data ALU
Register
File
Data
ALU
Q2PPC
Bridge
Serial Interface and TSA
The Freescale MSC8101
16-bit DSP is the first
member of the family of
DSPs based on the
StarCore SC140 DSP core.
The MSC8101 is available
in three core speed levels:
250, 275, and 300 MHz.
128-bit QBus
PIC
Interrupts
EFCOP
8/16-bit
Host
Interface
Boot
ROM
HDI16
SRAM
512 KB
L1 Interface
What鈥檚 New?
Rev. 16 includes the following
changes:
鈥?Changed most
REFCLK
references to
DLLIN
in
Section 2.7.4.
Power
Management
128-bit P-Bus
64-bit XA Data Bus
64-bit XB Data Bus
Figure 1.
MSC8101 Block Diagram
The Freescale MSC8101 DSP is a very versatile device that integrates the high-performance SC140 four-ALU (arithmetic
logic unit) DSP core along with 512 KB of internal memory, a communications processor module (CPM), a 64-bit bus, a very
flexible System Integration Unit (SIU), and a 16-channel DMA engine on a single device. With its four-ALU core, the
MSC8101 can execute up to four multiply-accumulate (MAC) operations in a single clock cycle. The MSC8101 CPM is a 32-
bit RISC-based communications protocol engine that can network to time-division multiplexed (TDM) highways, Ethernet,
and asynchronous transfer mode (ATM) backbones. The MSC8101 60x-compatible bus interface facilitates its connection to
multi-master system architectures. The very large internal memory, 512 KB, reduces the need for external program and data
memories. The MSC8101 offers 1500 DSP MMACS (1200 core and 300 EFCOP) performance using an internal 300 MHz
clock with a 1.6 V core and independent 3.3 V input/output (I/O).
漏 Freescale Semiconductor, Inc., 2001, 2004. All rights reserved.

MSC8101 PDF文件相关型号

MSC8101D

MSC8101相关型号PDF文件下载

扫码下载APP,
一键连接广大的电子世界。

在线人工客服

买家服务:
卖家服务:

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号,
第一时间获取资讯。

建议反馈

联系人:

联系方式:

按住滑块,拖拽到最右边
>>
感谢您向阿库提出的宝贵意见,您的参与是维库提升服务的动力!意见一经采纳,将有感恩红包奉上哦!