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tlc3548for msp430程序小弟看不懂，那位仁兄能帮忙

作者：supersunny　栏目：DSP技术

tlc3548for MSP430.html">MSP430程序小弟看不懂，那位仁兄能帮忙
最近作一个项目用到14位ad，没什么经验，就选了3548，到用的时候才发现自己不会用，看datasheet弄了一周也没效果，郁闷了，感谢那位达人，帮我看看
;************************************************************************
; MSP430F149.html">MSP430F149 DEMO – SPI Communication with TLC3544/48 or TLC3574/78 EVM
; Program implements a DIGITAL FILTER – takes the average of 4 SAMPLEs.html">SAMPLEs
; from CH0 of the ADC and returns them to the TLV5636 DAC
; TLV3574/8 MSP430F149.html">MSP430F149
; ------------- -------------
; | SDI|<---|P3.1 |
; | SDO|--->|P3.2 |
; CH0~~~>|IN+ SCLK|<---|P3.3 |
; | /CS|<---|P3.5 |
; | FS|<---|P3.6 |
; | |
; TLV5636 DAC | |
; --------------- | |
; | SDI|--->|P3.1 |
; | FS|<---|P3.6 via PLD |
; | /CS|<---|P3.5 via PLD |
;
; Assembled with IAR Embedded Workshop for MSP430 Kickstart
;
; Texas Instruments, Inc.
; Tom Hendrick
; Data Acquisition Applications - DALLAS
; Dec. 2000
;************************************************************************
#include "MSP430.html">MSP430x14x.h" // STANDARD Equations
#include "TLC357X.h" // ADC Equations
#include "legal.asm" // TI Legal Information
;************************************************************************
;Constants
;************************************************************************
CS equ 020h ; Set p3.5 to chip SELECT function
FS equ 040h ; Set p3.6 to frame sync function
CSTART equ 080h ; Set p3.7 to cstart function
SAMPLEs.html">SAMPLEs equ 004h ; Set NUMBER of SAMPLEs.html">SAMPLEs
SLAA126A
Interfacing the TLC3544/48 ADC to the MSP430F149.html">MSP430F149 9
;************************************************************************
;Setup RAM
;************************************************************************
RSEG UDATA0
ADC_Data DS 0 ; Data storage for ADC SAMPLEs.html">SAMPLEs
;************************************************************************
;Setup Stack
;************************************************************************
RSEG CSTACK
DS 0
;************************************************************************
;Program Code
;************************************************************************
RSEG CODE
;************************************************************************
RESET_ISR mov #SFE(CSTACK),SP ; define stackpointer
call #Init_Sys ; Initialize SYSTEM ports
call #SETUP_ADC ; Initialize ADC
call #Mainloop ; Start Main Loop
Mainloop
mov.b #SAMPLEs.html">SAMPLEs, R10 ; Load # of SAMPLEs.html">SAMPLEs in R10
mov #00, R8 ; Clear R8
SampleLoop
bic.b #CS,&P3OUT ; Enable TLC3544/48
bis.b #01h,&P1OUT ; Set a TEST.html">TEST bit – Bit is cleared in ISR
Read_ADC
mov.b #CH0,&U0TXBUF ; DUMMY.html">DUMMY write to SPI (generates SCLK)
call #CLEAR
mov.b &U0RXBUF,ADC_Data(R8) ; Store Upper Byte
inc R8 ; Increment data storage pointer
mov.b #DUMMY,&U0TXBUF ; DUMMY.html">DUMMY write to SPI (generates SCLK)
call #CLEAR
mov.b &U0RXBUF,ADC_Data(R8) ; Store Lower Byte
inc R8 ; Increment data storage pointer
TEST: mov.b #DUMMY,&U0TXBUF ; DUMMY.html">DUMMY write to SPI
SLAA126A
10 Interfacing the TLC3544/48 ADC to the MSP430F149.html">MSP430F149
call #CLEAR
bit.b #01h, &P1OUT ; Continue DUMMY writes till interrupt
jnz TEST
dec R10
cmp #00,R10
jnz SampleLoop ; Repeat till R10 = 0
; jmp Mainloop ; Repeat
; Remove remark from above LINE to skip transmit BACK to DAC
Write_DAC mov #0x0000, R13 ; Clear Register
mov #SAMPLEs.html">SAMPLEs, R10
mov #0x0000, R8 ; Load R8 with 0x0000h
next mov ADC_Data(R8), R12
swpb R12 ; Swap bytes in R12
and.w #0xFFF0, R12 ; Strip any trailing bits
rrc.w R12 ; Shift data 4 places
rrc.w R12 ; to conform to
rrc.w R12 ; DAC input format
rrc.w R12
and.w #0x0FFF, R12 ; Strip any carries
add.w R12, R13 ; Add shifted data to R13
incd R8
decd R10
cmp #00, R10 ; Is R10 = 0?
jnz next ; Get next SAMPLE
rrc.w R13 ; Shift result (divide by 4)
rrc.w R13 ;
and.w #0x0FFF, R13 ; Strip any carries
add.w #0x4000, R13 ; Set DAC FAST Mode
bic.b #FS,&P3OUT ; toggle Frame Sync
bis.b #FS,&P3OUT ; toggle Frame Sync
bic.b #FS,&P3OUT ; to DAC
swpb R13 ; Align MSB First
mov.b R13,&U0TXBUF ; Transmit upper Data Byte to DAC
call #CLEAR
swpb R13 ; Prepare Lower Byte
mov.b R13,&U0TXBUF ; Transmit lower Data Byte to DAC
call #CLEAR
bis.b #FS,&P3OUT ; Set Frame Sync
jmp Mainloop ; Repeat
SLAA126A
Interfacing the TLC3544/48 ADC to the MSP430F149.html">MSP430F149 11
;*******************************
; Clear TX Flag
;*******************************
CLEAR
bit.b #UTXIFG0, &IFG1 ; Thank You Eric! TXBUF ready?
jnc CLEAR ; 1 = ready
bic.b #UTXIFG0, &IFG1
ret
;************************************************************************
Init_Sys; MODULES and Controls Registers set-up subroutine
;************************************************************************
StopWDT mov #WDTPW+WDTHOLD,&WDTCTL ; Stop Watchdog Timer
SetupClock
bic.b #XTOFF, &BCSCTL1
bis.b #SELM1+SELS, &BCSCTL2
HF_WAIT ; 8MHZ CRYSTAL used – wait for stabilization
bic.b #OFIFG, &IFG1
bit.b #OFIFG, &IFG1
jnz HF_WAIT
bic.b #OFIFG, &IFG1 ; Clear Oscillator fault flag
bit.b #OFIFG, &IFG1 ; TEST for clear
SetupPort
bis.b #001h,&P1DIR ; P1.1 set to OUTPUT – Toggles LED
bis.b #01Eh,&P3SEL ; P3.1,2,3,4 SPI option SELECT
bis.b #CS+FS+CSTART,&P3DIR ; /CS, FS & CSTART = OUTPUT direction
bis.b #CS+FS+CSTART,&P3OUT ; P3.5,6,7 CS & FS set
SetupInterrupt
bic.b #02h, &P1IFG ; Clear Interrupt flags
bis.b #02h, &P1IES ; Set for edge SELECTion
bis.b #02h, &P1IE ; Enable external interrupt
SetupSPI
bis.b #040h,&ME1 ; Enable SPI TX/RX
mov.b #CHAR+SYNC+MM,&U0CTL ; 8-bit SPI MASTER
bis.b #SSEL0+SSEL1+STC,&U0TCTL
mov.b #02h,&U0BR0 ; Set SPI Baud Rate
mov.b #00h,&U0BR1
mov.b #00h,&U0MCTL
eint ; Enable interrupts
SLAA126A
12 Interfacing the TLC3544/48 ADC to the MSP430F149.html">MSP430F149
ret
;*********************************************************************************
SETUP_ADC ; Initialize the AtoD Converter
;*********************************************************************************
bic.b #CS,&P3OUT ; Set ADC /CS Lo
mov.b #WRITE,&U0TXBUF ; DUMMY.html">DUMMY write to SPI (generates SCLK)
call #CLEAR ; Clear SPI Flags
mov.b #DUMMY,&U0TXBUF ; DUMMY.html">DUMMY write to SPI (generates SCLK)
call #CLEAR
bis.b #CS,&P3OUT ; Set ADC /CS Hi
bic.b #CS,&P3OUT ; Set ADC /CS Lo
; Configuration Write to ADC
; See TLC357X.h file for details on the following parameters
mov.b #(WRITE+SHORT_SAMP+EXT_REF),&U0TXBUF
call #CLEAR
mov.b #DUMMY,&U0TXBUF ; DUMMY.html">DUMMY write to SPI (generates SCLK)
call #CLEAR
bis.b #CS,&P3OUT ; Set ADC /CS Hi
ret
;*********************************************************************************
IRQ_ISR; Exit LPM0 on reti
;*********************************************************************************
bic.b #01h, &P1OUT
bis.b #CS, &P3OUT ; Set ADC /CS High
bic.b #02h, &P1IFG
reti ; return from interrupt
;*********************************************************************************
COMMON INTVEC ; MSP430x11x1/MSP430F14x Interrupt vectors
;*********************************************************************************
ORG RESET_VECTOR
RESET_VEC DW RESET_ISR ; POR, ext. Reset, Watchdog
ORG PORT1_VECTOR
PORT1_VEC DW IRQ_ISR ; PORT1, Ext. Int.
END

2楼：	>>参与讨论
作者： xiaoxiao99 于 2006/1/6 12:01:00 发布：头晕,

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