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100325F Datasheet

  • 100325F

  • Low Power Hex ECL-to-TTL Translator

  • 129.12KB

  • 8页

  • NSC

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100325 Low Power Hex ECL-to-TTL Translator
August 1998
100325
Low Power Hex ECL-to-TTL Translator
General Description
The 100325 is a hex translator for converting F100K logic
levels to TTL logic levels. Differential inputs allow each circuit
to be used as an inverting, non-inverting or differential re-
ceiver. An internal reference voltage generator provides V
BB
for single-ended operation, or for use in Schmitt trigger appli-
cations. All inputs have 50 k鈩?pull-down resistors. When the
inputs are either unconnected or at the same potential the
outputs will go low.
When used in single-ended operation the apparent input
threshold of the true inputs is 20 mV to 40 mV higher (posi-
tive) than the threshold of the complementary inputs. The
V
EE
and V
TTL
power may be applied in either order.
Features
n
n
n
n
n
n
n
n
Pin/function compatible with 100125
Meets 100125 AC specifications
50% power reduction of the 100125
Differential inputs with built in offset
Standard FAST
庐
outputs
2000V ESD protection
鈭?.2V to 鈭?.7V operating range
Available to Microcircuit Drawing
(SMD) 5962-9153101
Logic Diagram
Pin Names
D
0
鈥揇
5
D
0
鈥揇
5
Q
0
鈥換
5
Description
Data Inputs
Inverting Data Inputs
Data Outputs
DS100314-4
FAST
庐
is a registered trademark of Fairchild Semiconductor.
漏 1998 National Semiconductor Corporation
DS100314
www.national.com

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