鈥?/div>
鈥?2.7 (V
CC
= 2.7 to 5.5V)
鈥?1.8 (V
CC
= 1.8 to 5.5V)
Low-power Devices (I
SB
= 6 碌A at 5.5V) Available
Internally Organized 8192 x 8
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bi-directional Data Transfer Protocol
400 kHz Clock Rate
Write Protect Pin for Hardware Data Protection
32-Byte Page Write Mode (Partial Page Writes Allowed)
Self-Timed Write Cycle (5 ms max)
High Reliability
鈥?Endurance: 1 Million Write Cycles
鈥?Data Retention: 100 Years
Lead-free/Halogen-free Devices Available
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP Packages
2-Wire
Serial EEPROM
64K (8192 x 8)
Description
The AT24C64B provides 65,536 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 8192 words of 8 bits each. The device鈥檚
cascadable feature allows up to 8 devices to share a common 2-wire bus. The device
is optimized for use in many industrial and commercial applications where low power
and low voltage operation are essential. The AT24C64B is available in space saving
8-lead PDIP, 8-lead JEDEC SOIC and 8-lead TSSOP packages and is accessed via a
2-wire serial interface. In addition, the entire family is available in 2.7V (2.7 to 5.5V)
and 1.8V (1.8 to 5.5V) versions.
AT24C64B
Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
8-lead PDIP
A0
A1
A2
GND
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
A0
A1
A2
GND
A0
A1
A2
GND
8-lead SOIC
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
2-Wire, 32K
Serial E
2
PROM
8-lead TSSOP
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
3350C鈥揝EEPR鈥?/04
1