74LCX86 Low Voltage Quad 2-Input Exclusive-OR Gate with 5V Tolerant Inputs
March 1995
Revised March 1999
74LCX86
Low Voltage Quad 2-Input Exclusive-OR Gate
with 5V Tolerant Inputs
General Description
The LCX86 contains four 2-input exclusive-OR gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
The 74LCX86 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V鈥?.6V V
CC
specifications provided
s
6.5 ns t
PD
max (V
CC
=
3.3V), 10
碌A
I
CC
max
s
Power down high impedance inputs and outputs
s
卤24
mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Machine model
>
2000V
Human model
>
200V
Ordering Code:
Order Number
74LCX86M
74LCX86SJ
74LCX86MTC
Package Number
M14A
M14D
MTC14
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
0
鈥揂
3
B
0
鈥揃
3
O
0
鈥揙
3
Description
Inputs
Inputs
Outputs
漏 1999 Fairchild Semiconductor Corporation
DS012415.prf
www.fairchildsemi.com