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AD5544 Datasheet

  • AD5544

  • Quad, Current-Output,Serial-Input 16-/14-Bit DACs

  • 2052.26KB

  • 22页

  • AD

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a
FEATURES
AD5544 16-Bit Resolution
AD5554 14-Bit Resolution
2 mA Full-Scale Current 20%, with V
REF
= 10 V
2 s Settling Time
V
SS
BIAS for Zero-Scale Error Reduction @ Temp
Midscale or Zero-Scale Reset
Four Separate 4Q Multiplying Reference Inputs
SPI-Compatible 3-Wire Interface
Double Buffered Registers Enable
Simultaneous Multichannel Change
Internal Power ON Reset
Compact SSOP-28 Package
APPLICATIONS
Automatic Test Equipment
Instrumentation
Digitally-Controlled Calibration
Quad, Current-Output
Serial-Input, 16-Bit/14-Bit DACs
AD5544/AD5554
FUNCTIONAL BLOCK DIAGRAM
V
REF
A B C D
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
A0
A1
V
DD
R
FB
A
INPUT
REGISTER R
DAC A
REGISTER R
DAC A
I
OUT
A
A
GND
A
R
FB
B
16
INPUT
REGISTER R
DAC B
REGISTER R
DAC B
I
OUT
B
A
GND
B
R
FB
C
INPUT
REGISTER R
DAC C
REGISTER R
DAC C
I
OUT
C
A
GND
C
CS
CLK
EN
DAC A
B
C
D
2:4
DECODE
INPUT
REGISTER R
DAC D
REGISTER R
DAC D
R
FB
D
I
OUT
D
A
GND
D
POWER-
ON
RESET
SDO
SDI
AD5544
A
GND
F
DGND
RS
MSB
LDAC
V
SS
GENERAL DESCRIPTION
The AD5544/AD5554 quad, 16-/14-bit, current-output, digital-
to-analog converters are designed to operate from a single 5 V
supply.
The applied external reference input voltage (V
REF
) determines
the full-scale output current. Integrated feedback resistors (R
FB
)
provide temperature-tracking, full-scale voltage outputs when
combined with an external I-to-V precision ampli铿乪r.
A doubled-buffered serial-data interface offers high-speed,
3-wire, SPI- and microcontroller-compatible inputs using
serial-data-in (SDI), clock (CLK), and a chip-select (CS). In
addition, a serial-data-out pin (SDO) allows for daisy-chaining
when multiple packages are used. A common level-sensitive
load-DAC strobe (LDAC) input allows simultaneous update of
all DAC outputs from previously loaded input registers. Addi-
tionally, an internal power ON reset forces the output voltage to
zero at system turn ON. An MSB pin allows system reset asser-
tion (RS) to force all registers to zero code when MSB = 0, or
to half-scale code when MSB = 1.
AD5544/AD5554 are packaged in the compact SSOP-28.
1.0
0.5
0.0
鈥?.5
鈥?.0
1.0
0.5
0.0
INL 鈥?LSB
DAC A
DAC B
鈥?.5
鈥?.0
1.0
0.5
0.0
鈥?.5
鈥?.0
1.0
0.5
0.0
鈥?.5
鈥?.0
0
8192
16384 24576 32768 40960 49152 57344 65536
CODE 鈥?Decimal
DAC C
DAC D
Figure 1. AD5544 INL vs. Code Plot (T
A
= 25
掳
C)
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
漏 Analog Devices, Inc., 2000

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