您的位置：维库电子市场网 > Datasheet > HCF4094
HCF4094数据手册封面

HCF4094 Datasheet

  • HCF4094

  • 8-STAGE SHIFT-AND-STORE BUS REGISTER

  • 296.57KB

  • 1页

  • STMicroelectronics   STMicroelectronics

纠错 0

扫码查看芯片数据手册

上传产品规格书

PDF预览

HCC/HCF4094B
8鈥揝TAGE SHIFT-AND-STORE BUS REGISTER
.
.
.
.
.
.
.
.
.
3-STATE PARALLEL OUTPUTS FOR CON-
NECTION TO COMMON BUS
SEPARATE
SERIAL
OUTPUTS
SYN-
CHRONOUS TO BOTH POSITIVE AND NEGA-
TIVE CLOCK EDGES FOR CASCADING
MEDIUM SPEED OPERATION 5MHz AT 10V
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED TO 20V
FOR HCC DEVICE
5V, 10V, AND 15V PARAMETRIC RATINGS
INPUT CURRENT OF 100nA AT 18V AND 25掳C
FOR HCC DEVICE
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC TEN-
TATIVE STANDARD N掳. 13A, 鈥漇TANDARD
SPECIFICATIONS FOR DESCRIPTION OF 鈥滲鈥?/div>
SERIES CMOS DEVICES鈥?/div>
EY
(Plastic Package)
F
(Ceramic Frit Seal Package)
M1
(Micro Package)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC4094BF
HCF4094BM1
HCF4094BEY
HCF4094BC1
PIN CONNECTIONS
DESCRIPTION
The
HCC4094B
(extended temperature range) and
HCF4094B
(intermediate temperature range) are
monolithic integrated circuits available in 16-lead
dual in-line plastic or ceramic packageand plastic
micropackage.
The
HCC/HCF4094B
is an 8-stage serial shift reg-
ister having a storage latch associated with each
stage for strobing data from the serial input to par-
allel buffered 3-state outputs. The parallel outputs
may be connected directly to common bus lines.
Data is shifted on positive clock transitions. The data
in each shift register stage is transferred to the stor-
age register when the STROBE input is high. Data
in the storage register appears at the outputs when-
ever the OUTPUT-ENABLE signal is high. Two ser-
ial outputs are available for cascading a number of
HCC/HCF4094B
devices. Data is available at the
Q
S
serial output terminal on positive clock edges to
allow for high-speed operation in cascaded systems
in which the clock rise time is fast. The same serial
information, available at the Q鈥?/div>
S
terminal on the next
negative clock edge, provides a means for cascad-
ing
HCC/HCF4094B
devices when the clock rise
time is slow.
June 1989
1/14

HCF4094相关型号PDF文件下载

您可能感兴趣的PDF文件资料

热门IC型号推荐

©2024 维库电子市场网（www.dzsc.com）　备案号：浙B2-20050339-1 经营许可证：浙B2-20210386版权声明
买家服务热线：0571-85317607 | 买家服务部QQ： QQ:1609526468
卖家服务热线：0571-85317607 | 卖家服务部QQ： QQ:331652727

扫码下载APP，
一键连接广大的电子世界。

在线人工客服

买家服务：
卖家服务：

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号，
第一时间获取资讯。

建议反馈
返回顶部

建议反馈

联系人：

联系方式：

按住滑块，拖拽到最右边
>>
感谢您向阿库提出的宝贵意见，您的参与是维库提升服务的动力！意见一经采纳，将有感恩红包奉上哦！

PDF纠错X

投诉电话：0571-85317607 投诉QQ：

如选匿名将无法为您反馈投诉结果，建议实名投诉！