IDT7130LA Datasheet

  • IDT7130LA

  • HIGH SPEED 1K X 8 DUAL-PORT STATIC SRAM

  • 152.16KB

  • IDT

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HIGH-SPEED
1K x 8 DUAL-PORT
STATIC RAM
Integrated Device Technology, Inc.
IDT7130SA/LA
IDT7140SA/LA
FEATURES
鈥?High-speed access
鈥擬ilitary: 25/35/55/100ns (max.)
鈥擟ommercial: 25/35/55/100ns (max.)
鈥擟ommercial: 20ns 7130 in PLCC and TQFP
鈥?Low-power operation
鈥擨DT7130/IDT7140SA
鈥擜ctive:
550mW (typ.)
鈥擲tandby:
5mW (typ.)
鈥擨DT7130/IDT7140LA
鈥擜ctive:
550mW (typ.)
鈥擲tandby:
1mW (typ.)
鈥?MASTER IDT7130 easily expands data bus width to
16-or-more-bits using SLAVE IDT7140
鈥?On-chip port arbitration logic (IDT7130 Only)
鈥?/div>
BUSY
output flag on IDT7130;
BUSY
input on IDT7140
鈥?Interrupt flags for port-to-port communication
鈥?Fully asynchronous operation from either port
鈥?Battery backup operation鈥?V data retention (LA only)
鈥?TTL-compatible, single 5V
卤10%
power supply
鈥?Military product compliant to MIL-STD-883, Class B
鈥?Standard Military Drawing #5962-86875
鈥?Industrial temperature range (鈥?0掳C to +85掳C) is avail-
able, tested to military electrical specifications
DESCRIPTION
The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port
Static RAMs. The IDT7130 is designed to be used as a
stand-alone 8-bit Dual-Port RAM or as a "MASTER" Dual-
Port RAM together with the IDT7140 "SLAVE" Dual-Port in
16-bit-or-more word width systems. Using the IDT MAS-
TER/SLAVE Dual-Port RAM approach in 16-or-more-bit
memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
Both devices provide two independent ports with sepa-
rate control, address, and I/O pins that permit independent
asynchronous access for reads or writes to any location in
memory. An automatic power down feature, controlled by
CE
, permits the on chip circuitry of each port to enter a very
low standby power mode.
Fabricated using IDT's CMOS high-performance tech-
nology, these devices typically operate on only 550mW of
power. Low-power (LA) versions offer battery backup data
retention capability, with each Dual-Port typically consum-
ing 200碌W from a 2V battery.
The IDT7130/IDT7140 devices are packaged in 48-pin
sidebraze or plastic DIPs, LCCs, or flatpacks, 52-pin PLCC,
and 64-pin TQFP and STQFP. Military grade product is
manufactured in compliance with the latest revision of MIL-
STD-883, Class B, making it ideally suited to military tem-
perature applications demanding the highest level of per-
formance and reliability.
FUNCTIONAL BLOCK DIAGRAM
OE
L
CE
L
R/
W
L
OE
R
R/
W
R
CE
R
I/O
0L
- I/O
7L
I/O
Control
I/O
Control
I/O
0R
-I/O
7R
BUSY
L
(1,2)
BUSY
R
Address
Decoder
10
(1,2)
A
9L
A
0L
MEMORY
ARRAY
Address
Decoder
A
9R
A
0R
10
NOTES:
1. IDT7130 (MASTER):
BUSY
is open
drain output and requires pullup
resistor of 270鈩?
IDT7140 (SLAVE):
BUSY
is input.
2. Open drain output: requires pullup
resistor of 270鈩?
CE
L
OE
L
R/
W
L
ARBITRATION
and
INTERRUPT
LOGIC
CE
R
OE
R
R/
W
R
INT
L
(2)
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INT
R
2689 drw 01
(2)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
漏1996 Integrated Device Technology, Inc.
For latest information contact IDT鈥檚 web site at www.idt.com or fax-on-demand at 408-492-8391.
OCTOBER 1996
DSC-2689/7
6.01
1

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