鈥?/div>
with V
EE
= 0 V
NECL Mode Operating Range: V
CC
= 0 V
with V
EE
=
鈭?.2
V to
鈭?.7
V
Q Output will Default LOW with Inputs Open or at V
EE
Internal Input Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
Pb鈭扚ree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V鈭? @ 1.125 in,
Oxygen Index: 28 to 34
Transistor Count = 182 devices
Pb鈭扚ree Package is Available*
MARKING DIAGRAM*
20
100EL59
AWLYYWWG
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
漏
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 3
1
Publication Order Number:
MC100EL59/D
1
2
3
4
5
