鈥?/div>
1
A
L
Y
W
M
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Date Code
= Pb鈭扚ree Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
漏
Semiconductor Components Industries, LLC, 2006
December, 2006
鈭?/div>
Rev. 8
1
Publication Order Number:
MC100EPT24/D
3U MG
G
4
350 ps Typical Propagation Delay
Maximum Input Clock Frequency > 1.0 GHz Typical
The 100 Series Contains Temperature Compensation
Operating Range: V
CC
= 3.0 V to 3.6 V;
V
EE
=
鈭?.6
V to
鈭?.0
V; GND = 0 V
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PNP LVTTL Input for Minimal Loading
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Q Output will Default HIGH with Input Open
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Pb鈭扚ree Packages are Available
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MC100LVEL12DG PDF文件相关型号
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