MC100LVEL90DWG Datasheet

  • MC100LVEL90DWG

  • ON Semiconductor [−3.3V / −5V Triple EC...

  • 113.00KB

  • ONSEMI

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MC100LVEL90
鈭?.3V / 鈭?V Triple ECL Input
to LVPECL Output Translator
Description
The MC100LVEL90 is a triple ECL to LVPECL translator. The device
receives either
鈭?.3
V or
鈭?
V differential ECL signals, determined by the
V
EE
supply level, and translates them to +3.3 V differential LVPECL
output signals.
To accomplish the level translation, the LVEL90 requires three power
rails. The V
CC
supply should be connected to the positive supply, and the
V
EE
pin should be connected to the negative power supply. The GND
pins, as expected, are connected to the system ground plane. Both V
EE
and V
CC
should be bypassed to ground via 0.01
mF
capacitors.
Under open input conditions, the D input will be biased at V
EE
/2 and
the D input will be pulled to V
EE
. This condition will force the Q output
to a LOW, ensuring stability.
The V
BB
pin, an internally generated voltage supply, is available to this
device only. For single-ended input conditions, the unused differential
input is connected to V
BB
as a switching reference voltage. V
BB
may also
rebias AC coupled inputs. When used, decouple V
BB
and V
CC
via a
0.01
mF
capacitor and limit current sourcing or sinking to 0.5 mA. When
not used, V
BB
should be left open.
Features
http://onsemi.com
SO鈭?0 WB
DW SUFFIX
CASE 751D
MARKING DIAGRAM*
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
500 ps Propagation Delays
ESD Protection: >2 kV HBM, >200 V MM
The 100 Series Contains Temperature Compensation
20
100LVEL90
AWLYYWWG
Operating Range: V
CC
= 3.0 V to 3.8 V;
V
EE
=
鈭?.0
V to
鈭?.5
V; GND = 0 V
鈥?/div>
Internal Input Pulldown Resistors
1
A
WL
YY
WW
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb鈭扚ree Package
鈥?/div>
Q Output will Default LOW with Inputs Open or at V
EE
鈥?/div>
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
鈥?/div>
Moisture Sensitivity;
Pb Pkg
Level 1,
Pb鈭扚ree Pkg
Level 3
For Additional Information, see Application Note AND8003/D
鈥?/div>
Flammability Rating: UL 94 V鈭? @ 0.125 in,
Oxygen Index: 28 to 34
鈥?/div>
Transistor Count = 261 devices
*For additional marking information, refer to
Application Note AND8002/D.
鈥?/div>
Pb鈭扚ree Packages are Available*
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
*For additional information on our Pb鈭扚ree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
Semiconductor Components Industries, LLC, 2006
November, 2006
鈭?/div>
Rev. 11
1
Publication Order Number:
MC100LVEL90/D

MC100LVEL90DWG 产品属性

  • 38

  • 集成电路 (IC)

  • 逻辑 - 变换器

  • 100LVEL

  • 变换器

  • 3

  • ECL

  • LVPECL

  • -

  • 3

  • 1

  • 无/无

  • 0.67ns

  • 3 V ~ 3.8 V

  • -40°C ~ 85°C

  • 20-SOIC(0.295",7.50mm 宽)

  • 20-SOIC

  • 管件

  • MC100LVEL90DWGOS

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