MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14011B/12B (see pg 6-5)
MC14011UB/12UB (see pg 6-14)
MC14013B
Dual Type D Flip-Flop
The MC14013B dual type D flip鈥揻lop is constructed with MOS P鈥揷hannel
and N鈥揷hannel enhancement mode devices in a single monolithic structure.
Each flip鈥揻lop has independent Data, (D), Direct Set, (S), Direct Reset, (R),
and Clock (C) inputs and complementary outputs (Q and Q). These devices
may be used as shift register elements or as type T flip鈥揻lops for counter and
toggle applications.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge鈥揅locked Flip鈥揊lop Design
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive鈥揼oing edge
of the clock pulse
鈥?/div>
Capable of Driving Two Low鈥損ower TTL Loads or One Low鈥損ower
Schottky TTL Load Over the Rated Temperature Range
鈥?/div>
Pin鈥揻or鈥揚in Replacement for CD4013B
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
VDD
Parameter
DC Supply Voltage
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦脦脦脦脦脦脦脦
脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦脦脦脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
脦
脦
脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦脦
Value
Unit
V
V
鈥?0.5 to + 18.0
Vin, Vout
lin, lout
PD
Input or Output Voltage (DC or Transient)
鈥?0.5 to VDD + 0.5
卤
10
500
Input or Output Current (DC or Transient),
per Pin
Power Dissipation, per Package鈥?/div>
Storage Temperature
mA
mW
Tstg
TL
鈥?65 to + 150
260
TA = 鈥?55掳 to 125掳C for all packages.
BLOCK DIAGRAM
6
5
D
S
Q
1
_
C
_
C
Lead Temperature (8鈥揝econd Soldering)
3
4
8
9
C
* Maximum Ratings are those values beyond which damage to the device may occur.
鈥燭emperature Derating:
Plastic 鈥淧 and D/DW鈥?Packages: 鈥?7.0 mW/
_
C From 65
_
C To 125
_
C
Ceramic 鈥淟鈥?Packages: 鈥?12 mW/
_
C From 100
_
C To 125
_
C
R
Q
2
TRUTH TABLE
Inputs
Clock鈥?/div>
Data
0
1
X
X
X
X
X
X
X
Reset
0
0
0
1
0
1
Set
0
0
0
0
1
1
Outputs
Q
0
1
Q
0
1
1
Q
1
0
Q
1
0
1
No
Change
D
S
Q
13
11
10
C
R
Q
12
VDD = PIN 14
VSS = PIN 7
X = Don鈥檛 Care
鈥?= Level Change
REV 3
1/94
漏
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
MC14013B
45
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