100331QC Datasheet

  • 100331QC

  • Low Power Triple D-Type Flip-Flop

  • 103.88KB

  • 10页

  • FAIRCHILD

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100331 Low Power Triple D-Type Flip-Flop
February 1990
Revised August 2000
100331
Low Power Triple D-Type Flip-Flop
General Description
The 100331 contains three D-type, edge-triggered master/
slave flip-flops with true and complement outputs, a Com-
mon Clock (CP
C
), and Master Set (MS) and Master Reset
(MR) inputs. Each flip-flop has individual Clock (CP
n
),
Direct Set (SD
n
) and Direct Clear (CD
n
) inputs. Data enters
a master when both CP
n
and CP
C
are LOW and transfers
to a slave when CP
n
or CP
C
(or both) go HIGH. The Master
Set, Master Reset and individual CD
n
and SD
n
inputs over-
ride the Clock inputs. All inputs have 50 k
鈩?/div>
pull-down
resistors.
Features
s
35% power reduction of the 100131
s
2000V ESD protection
s
Pin/function compatible with 100131
s
Voltage compensated operating range
= 鈭?/div>
4.2V to
鈭?/div>
5.7V
s
Available to industrial grade temperature range
Ordering Code:
Order Number
100331SC
100331PC
100331QC
100331QI
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
鈭?/div>
40
C to
+
85
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP/SOIC
Pin Descriptions
Pin Names
CP
0
鈥揅P
2
CP
C
D
0
鈥揇
2
CD
0
鈥揅D
2
SD
n
MR
MS
Q
0
-Q
2
Q
0
鈥換
2
Description
Individual Clock Inputs
Common Clock Input
Data Inputs
Individual Direct Clear Inputs
Individual Direct Set Inputs
Master Reset Input
Master Set Input
Data Outputs
Complementary Data Outputs
28-Pin PLCC
漏 2000 Fairchild Semiconductor Corporation
DS010262
www.fairchildsemi.com

100331QC 产品属性

  • 35

  • 集成电路 (IC)

  • 逻辑 - 触发器

  • -

  • 主复位

  • D 型总线

  • 差分

  • 3

  • 1

  • 400MHz

  • 1ns

  • 正边沿

  • -

  • 4.2 V ~ 5.7 V

  • -40°C ~ 85°C

  • 表面贴装

  • 28-PLCC

  • 管件

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