鈭?/div>
2V Undershoot Protection
and Level Shifting
General Description
The Fairchild Switch FSTUD16211 provides 24-bits of
high-speed CMOS TTL-compatible bus switching. The low
on resistance of the switch allows inputs to be connected to
outputs without adding propagation delay or generating
additional ground bounce noise. A diode to V
CC
has been
integrated into the circuit to allow for level shifting between
5V inputs and 3.3V outputs.
The device is organized as a 12-bit or 24-bit bus switch.
When OE
1
is LOW, the switch is ON and Port 1A is con-
nected to Port 1B. When OE
2
is LOW, Port 2A is connected
to Port 2B. When OE
1/2
is HIGH, a high impedance state
exists between the A and B Ports. The A and B Ports have
鈥渦ndershoot hardened鈥?circuit protection to support an
extended range to 2.0V below ground. Fairchild鈥檚 inte-
grated Undershoot Hardened Circuit (UHC
铮?/div>
) senses
undershoot at the I/O鈥檚, and responds by preventing volt-
age differentials from developing and turning on the switch.
Features
s
Undershoot hardened to
鈭?/div>
2V (A and B Ports)
s
Voltage level shifting
s
4
鈩?/div>
switch connection between two ports
s
Minimal propagation delay through the switch
s
Low l
CC
s
Zero bounce in flow-through mode
s
Control inputs compatible with TTL level
s
See Applications Note AN-5008 for details
s
Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA) (Preliminary)
Ordering Code:
Order Number
FSTUD16211GX
(Note 1)
FSTUD16211MTD
Package Number
BGA54A
(Preliminary)
MTD56
Package Description
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
[TAPE and REEL]
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Note 1:
BGA package available in Tape and Reel only.
Logic Diagram
UHC铮?is a trademark of Fairchild Semiconductor Corporation.
漏 2001 Fairchild Semiconductor Corporation
DS500390
www.fairchildsemi.com
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