GS809C and GS810C
Microprocessor Reset Monitors
uct
rod
wP
Ne
Pin Configuration
SOT-23 (Top View)
GND
1
3
Reset
Output
2
V
cc
Description
鈥?The GS809C and 810C are system supervisor
circuits designed to monitor V
CC
in digital systems
and provide a reset signal to the host processor
when necessary. No external components are
required.
鈥?When the processor power supply voltage drops
below the reset threshold, the reset output is driven
active, in less than 40碌s (T
D1
). Reset is main-
tained active for a time period (T
D2
), after the V
cc
rises above the threshold voltage.
鈥?To prevent jitter, the reset threshold voltage has a
built-in hysteresis of 0.4% of V
TH
.
鈥?The GS809C has an active-low reset output, while
the GS810C has an active-high reset output. Both
devices have push/pull output drives.
鈥?The reset signal is guaranteed valid, down to
V
cc
= 1.0V.
鈥?Low supply current of 3碌A makes these devices
well suited for battery powered applications. They
are designed to reject fast transients from causing
false resets.
鈥?Both devices are available in a space-saving
SOT-23 package.
Fig. 1 鈥?Typical Application Diagram
V
CC
V
CC
GS809C
Reset
V
CC
Processor
Reset
Input
GND
GND
Applications
鈥?Computers
鈥?Battery Powered Equipment
鈥?Critical uProcessor and uController power supply
monitoring
Features
鈥?Tight reset voltage tolerances 卤 1.5%
鈥?4 reset active timeout period options
鈥?Low quiescent current: < 3碌A
鈥?9 reset threshold options from 2.1V to 4.63V
鈥?Reset output guaranteed down to 1.0V
鈥?No external components
鈥?V
cc
Transient immunity
鈥?Wide temperature range 鈥?0掳C to +85掳C
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