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ICS1526 Datasheet

  • ICS1526

  • Video Clock Synthesizer

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  • ICS

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Integrated Circuit Systems
Preliminary Data Sheet
ICS1526
Video Clock Synthesizer
General Description
The ICS1526 is a low-cost, high-performance
frequency generator. It is suited to general purpose
phase controlled clock synthesis as well as
line-locked and genlocked high-resolution video
applications. Using ICS鈥檚 advanced low-voltage
CMOS mixed-mode technology, the ICS1526 is an
effective clock synthesizer that supports video
projectors and displays at resolutions from VGA to
beyond XGA.
The ICS1526 offers single-ended clock outputs to 200
MHz. The HSYNC_out, and VSYNC_out pins provide
the regenerated versions of the HSYNC and VSYNC
inputs synchronous to the CLK output.
The advanced PLL uses its internal programmable
feedback divider. The device is programmed by a
standard I
2
C-bus鈩?serial interface and is available in
a TSSOP16 package.
Features
鈥?Lead-free packaging (Pb-free)
鈥?Low jitter (typical 27 ps short term jitter)
鈥?Wide input frequency range
鈥?8 kHz to 100 MHz
鈥?LVCMOS single-ended clock outputs
鈥?Up to 200 MHz
鈥?Uses 3.3 V power supply
鈥?5 Volt tolerant Inputs (HSYNC, VSYNC)
鈥?Coast (ignore HSYNC) capability via VSYNC pin
鈥?Industry standard I
2
C-bus programming interface
鈥?PLL Lock detection via I
2
C or LOCK output pin
鈥?16-pin TSSOP package
Applications
鈥?Frequency synthesis
鈥?LCD monitors, video projectors and plasma displays
鈥?Genlocking multiple video subsystems
ICS1526 Functional Diagram
Pin Configuration (16-pin TSSOP)
OSC
HSYNC
VSYNC
I
2
C
HSYNC_out
ICS1526
VSYNC_out
CLK
LOCK
VSSD
SDA
SCL
VSYNC
HSYNC
VDDA
VSSA
OSC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
VDDD
VSSQ
VSYNC_out
VDDQ
CLK
HSYNC_out
LOCK
I2CADR
MDS 1526 I
ICS reserves the right to make changes in the preliminary device data
identified in this publication without notice. ICS advises its customers
to obtain the latest version of all device data to verify that information
being relied upon is current and accurate.
Revision 020304

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