ICS1567-742 Datasheet

  • ICS1567-742

  • Differential Output Video Dot Clock Generator

  • 164.87KB

  • 11页

  • ICS

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Integrated
Circuit
Systems, Inc.
ICS1567
Differential Output Video Dot Clock Generator
General Description
The
ICS1567
is a very high performance monolithic PLL
frequency synthesizer. Utilizing ICS鈥檚 advanced CMOS
mixed-mode technology, the
ICS1567
provides a low cost
solution for high-end video clock generation, and for telecom
system clock generation.
The
ICS1567
has differential video clock outputs (CLK and
CLK) that are compatible with industry standard video DACs
& RAMDACs. An additional clock output, LD, is provided,
whose frequency is divided down from the main clock by a
programmable divider.
Operating frequencies are selectable from a pre-programmed
(customer-defined) table. An on-chip crystal oscillator for gen-
erating the reference frequency is provided on the
ICS1567.
Programming of the
ICS1567
is accomplished via frequency
select pins on the package. The
ICS1567
has five lines plus a
STROBE pin which permits selection of 32 frequencies. Reset
of the pipeline delay on Brooktree RAMDACs is automatically
performed on a rising edge of the STROBE line.
Features
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High frequency operation for extended video modes - up
to 180 MHz
Compatible with Brooktree high performance RAMDACs
a) Differential output clocks with ECL logic levels
b) Programmable divider modulus for load clock
c) Circuitry included for automatic reset of Brooktree
RAMDAC pipeline delay
Low cost - eliminates need for multiple ECL crystal clock
oscillators in video display systems
Strobed/Transparent frequency select options
32-user selected mask-programmable frequencies
Fast acquisition of selected frequencies, strobed or non-
strobed
Advanced PLL for low phase-jitter
Dynamic control of VCO sensitivity providing optimized
loop gain over entire frequency range
Small footprint - 16-pin wide body (300 mil) SOIC
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Applications
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Workstations
High-resolution PC and MAC displays
8514A - TMS340X0 systems
EGA - VGA - Super VGA video
Telecom reference clock generation - suitable for Sonet,
ATM and other data rates up to 155.52Mb.
Pin Configuration
FS0
XTAL1
XTAL2
STROBE
VSS
VSS
LD
FS4
1
2
4
5
6
7
8
3
16
15
14
13
12
11
10
9
FS1
FS2
FS3
VDD
VDDO
VDDO
CLK
CLK
16-Pin SOIC
ICS1567RevB090894
ICS1567

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