Integrated
Circuit
Systems, Inc.
ICS2694
Motherboard Clock Generator
Description
The
ICS2694
Motherboard Clock Generator is an integrated
circuit using PLL and VCO technology to generate virtually all
the clock signals required in a PC. The use of the device can be
generalized to satisfy the timing needs of most digital systems
by reprogramming the VCO or reconfiguring the counter stages
which derive the output frequencies from the VCO鈥檚.
The primary VCO is customarily used to generate the CPU
clock and is so labeled on the
ICS2694.
Pre-programmed
frequency sets are listed on page 6. These choices were made
to match the major microprocessor families. CPUSEL (0-3)
allow the user to select the appropriate frequency for the
application.
Due to the filter in the phase-locked loop, the CPUCLK will
move in a linear fashion from one frequency to a newly-
selected frequency without glitches. If a fixed CPUCLK value
is desired, CPUSEL (0-3) may be hard wired to the desired
address with STROBE tied high. (It has a pull-up.) For board
test and debug, pulling OUTPUTE to Ground will tristate all
the outputs.
Features
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Low cost - eliminates multiple oscillators and Count
Down Logic
Primary VCO has 16 Mask Programmable frequencies
(normally CPU clock)
Secondary VCO has 1 Mask Programmable frequency
(usually 96 MHz)
Pre-programmed versions for typical PC applications
10 Outputs in addition to the primary CPU clock
Capability to reconfigure counter stages to change the
frequencies of the outputs via mask options
Advanced PLL design
On-chip PLL filters
Very Flexible Architecture
Applications
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CPU clock and Co-processor clock
Hard Disk and Floppy Disk clock
Keyboard clock
Serial Port clock
Bus clock
System counting or timing functions
Pin Configuration
OUT2
OUT1
OUT0
OUT9
CPUCLK
VSS
DVDD
STROBE
CPUSEL0
CPUSEL1
CPUSEL2
CPUSEL3
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OUT3
OUT4
OUT5
OUT6
OUT7
(CPUCLK/2)
OUT8
AVDD
XTAL2
XTAL1
AVSS
OUTPUTE
CLKIN
24-Pin DIP or SOIC
ICS2694RevA1094
ICS2694
ICS2694M相关型号PDF文件下载
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