ICS671-01
Zero Delay, Low Skew Buffer and Multipler
Description
The ICS671-01 is a low phase noise, high speed
PLL based, 8 output, low skew zero delay buffer
and multiplier. Based on ICS鈥檚 proprietary low
jitter Phase Locked Loop (PLL) techniques, the
device provides eight low skew outputs at speeds
up to 160 MHz at 3.3 V. The ICS671-01 includes
a bank of six outputs running at either x2 or x4
mode, one output running at either x2, x4, or x5
mode, and one more output running at either x1,
x2, or x4 mode. For normal operation, output
clock CLK8 is tied to the FBIN pin.
ICS manufactures the largest variety of clock
generators and buffers, and is the largest clock
supplier in the world.
Features
鈥?Packaged in 16 pin narrow SOIC
鈥?Clock outputs from 5 to 160 MHz
鈥?Zero input-output delay
鈥?Integrated x2 or x4 selections, and x5 for CLK7
鈥?Eight low-skew (<250 ps) outputs
鈥?Full CMOS outputs with 25 mA output drive
capability at TTL levels
鈥?Tri-state mode for board-level testing
鈥?Advanced, low power, sub-micron CMOS process
鈥?3.3 V to 5 V operating voltage
Block Diagram
CLK1
CLK2
CLK3
CLKIN
FBIN
x2, x4, or x5
PLL
CLK4
CLK5
CLK6
CLK7
2
S1, S0
Control
Logic
CLK8
1
Revision 051700
Printed 11/15/00
Integrated Circuit Systems, Inc.鈥?525 Race Street 鈥?San Jose 鈥A鈥?5126鈥?(408) 295-9800 tel 鈥?www.icst.com
MDS 671-01 B
1
2
3
4
