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M2004-02-669.1281 Datasheet

  • M2004-02-669.1281

  • Frequency Synthesizer

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  • 10页

  • ICS

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Micro Networks
An Integrated Circuit Systems Company
M2004-02
Preliminary Specifications
M2004-02
Frequency Synthesizer
DESCRIPTION
The M2004-02 integrates a high performance Phase
Locked Loop (PLL) with a Voltage Controlled SAW
Oscillator (VCSO) to provide a low jitter Frequency
Synthesizer in a 9mm x 9mm surface mount
package.
The internal high 鈥淨鈥?SAW filter provides low jitter
signal performance and determines the maximum
output frequency of the VCSO.
A programmable output divider can divide the VCSO
frequency to achieve an output as low as 38.88MHz.
The input to the Frequency Synthesizer is provided
by selecting between a differential input clock or a
single ended input clock.
The output frequency is an integer multiple of the
input reference frequency. The multiplying factor is
programmed via a 6 bit parallel address.
An external loop filter sets the PLL bandwidth which
can be optimized to provide jitter attenuation of the
input reference clock.
The bandwidth control, low phase noise, and HOLD
features make the M2004-02 ideal for use as a clock
jitter attenuator, frequency translator, and clock
frequency generator in OC-3 through OC-192
applications.
FEATURES
Output Clock Frequency up to 700MHz
Internal Low-jitter SAW-based Oscillator
Intrinsic Jitter <1ps rms (12kHz - 20MHz)
Differential Input Compatible with LVPECL,
LVDS, HSTL, SSTL, etc.
Dual Input MUX
Parallel Programming
Tunable Loop Filter Response
Differential LVPECL Outputs
3.3V Operation
Small 9mm x 9mm SMT Package
APPLICATIONS
SONET / SDH / 10GbE System
Synchronization
Add / Drop Muxes, Access and Edge
Switches
Line Card System Clock Cleaner /
Translator
Optical Module Clock Cleaner / Translator
ISO 9001
Registered
Micro Networks
324 Clark Street
Worcester, MA 01606
tel: 508-852-5400
1
fax: 508-852-8456
www.micronetworks.com

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