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MX26L6420XAI-12 Datasheet

  • MX26L6420XAI-12

  • 64M-BIT [4M x 16] CMOS MULTIPLE-TIME-PROGRAMMABLE EPROM

  • 1253.87KB

  • 39页

  • MCNIX

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ADVANCED INFORMATION
MX26L6420
64M-BIT [4M x 16] CMOS
MULTIPLE-TIME-PROGRAMMABLE EPROM
FEATURES
鈥?/div>
4,194,304 x 16 byte structure
鈥?/div>
Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program
operations
鈥?/div>
Status Reply
- Data polling & Toggle bits provide detection of
program and erase operation completion
鈥?/div>
12V ACC input pin provides accelerated program
capability
鈥?/div>
Low Vcc write inhibit is equal to or less than 2.5V
鈥?/div>
Compatible with JEDEC standard
鈥?/div>
High Performance
- Fast access time: 90/120ns (typ.)
- Fast program time: 140s/chip (typ.)
- Fast erase time: 150s/chip (typ.)
鈥?/div>
Low Power Consumption
- Low active read current: 17mA (typ.) at 5MHz
- Low standby current: 30uA (typ.)
鈥?/div>
Output voltages and input voltages on the device is
deterined by the voltage on the VI/O pin.
- VI/O voltage range:1.65V~3.6V
鈥?/div>
10 years data retention
鈥?/div>
Package
- 44-Pin SOP
- 48-Pin TSOP
- 48-Ball CSP
- 63-Ball CSP
鈥?/div>
Minimum 100 erase/program cycle
GENERAL DESCRIPTION
The MX26L6420 is a 64M bit MTP EPROM
TM
organized
as 4M bytes of 16 bits. MXIC's MTP EPROM
TM
offer the
most cost-effective and reliable read/write non-volatile
random access memory. The MX26L6420 is packaged in
44SOP, 48-pin TSOP, 48-ball CSP and 63-ball CSP. It is
designed to be reprogrammed and erased in system or in
standard EPROM programmers.
The standard MX26L6420 offers access time as fast as
90ns, allowing operation of high-speed microprocessors
without wait states. To eliminate bus contention, the
MX26L6420 has separate chip enable (CE) and output
enable OE controls. MXIC's MTP EPROM
TM
augment
EPROM functionality with in-circuit electrical erasure and
programming. The MX26L6420 uses a command register
to manage this functionality.
MXIC's MTP EPROM
TM
technology reliably stores
memory contents even after 100 erase and program
cycles. The MXIC cell is designed to optimize the erase
and program mechanisms. In addition, the combination of
advanced tunnel oxide processing and low internal
electric fields for erase and programming operations
produces reliable cycling.
The MX26L6420 uses a 2.7V to 3.6V VCC supply to
perform the High Reliability Erase and auto Program/
Erase algorithms.
The highest degree of latch-up protection is achieved with
MXIC's proprietary non-epiprocess. Latch-up protection
is proved for stresses up to 100 milliamps on address and
data pin from -1V to VCC +1V.
P/N:PM0823
REV. 0.5, JAN. 29, 2002
1

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