P1708CF-08SR Datasheet

  • P1708CF-08SR

  • Low Power Notebook LCD Panel EMI Reduction IC

  • 474.16KB

  • 10页

  • ALSC

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June 2004
rev 1.1
Low Power Notebook LCD Panel EMI Reduction IC
Features
FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum clock of the
input frequency.
Optimized for frequency range from 50 to 110MHz.
Internal loop filter minimizes external components
and board space.
Four selectable spread ranges.
Low inherent cycle-to-cycle jitter.
3.3V operating voltage range.
TTL or CMOS compatible inputs and outputs.
Ultra-low power CMOS design.
8.46 mA @3.3V, 54MHz
9.79 mA @3.3V, 65MHz
12.06 mA @3.3V, 81MHz
16.51 mA @3.3V, 108MHz
Supports notebook VGA and other LCD timing
controller applications.
Pinout compatible to ICS MK1708 and Cypress
CY25560.
SSON/SBM pin for Spread Spectrum On/Off and
Standby Mode controls.
Available in 8-pin SOIC and TSSOP.
P1708C
down stream clock and data dependent signals. The
P1708C allows significant system cost savings by reducing
the number of circuit board layers ferrite beads, shielding
and other passive components that are traditionally
required to pass EMI regulations.
The P1708C modulates the output of a single PLL in order
to 鈥渟pread鈥?the bandwidth of a synthesized clock, and more
importantly,
decreases
the
peak
amplitudes
of
its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal鈥檚 bandwidth is called 鈥榮pread
spectrum clock generation鈥?
The P1708C uses the most efficient and optimized
modulation
profile
approved
by
the
FCC
and
is
implemented in a proprietary all digital method.
Applications
The P1708C is targeted towards notebook LCD displays,
and other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
Product Description
The P1708C is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1708C reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
VDD
Block Diagram
SR0
SR1 SSON
Modulation
CLKIN
Frequency
Divider
Feedback
Divider
PLL
Phase
Detector
Loop
Filter
VCO
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive
鈥?/div>
Santa Clara, CA
鈥?/div>
Tel: 408.855.4900
鈥?/div>
Fax: 408.855.4999
鈥?/div>
www.alsc.com
Notice: The information in this document is subject to change without notice.

P1708CF-08SR 产品属性

  • 2,500

  • 集成电路 (IC)

  • 时钟/计时 - 时钟发生器,PLL,频率合成器

  • -

  • 扩展频谱时钟发生器

  • CMOS,TTL

  • CMOS,TTL

  • 1

  • 1:1

  • 无/无

  • 110MHz

  • 是/无

  • 2.7 V ~ 3.7 V

  • -40°C ~ 85°C

  • 表面贴装

  • 8-SOIC(0.154",3.90mm 宽)

  • 8-SOICN

  • 带卷 (TR)

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