鈻?/div>
DMA
鈥?4 DMA controllers with 4 channels each
Timers
鈥?16-bit watchdog timer (WDG)
鈥?6/10 16-bit timers (TIM) each with: 2 input
captures, 2 output compares, PWM and pulse
counter modes
鈥?6 16-bit PWM modules (PWM)
鈥?3 16-bit timebase timers with 8-bit prescalers
12 Communications Interfaces
鈥?2 I
2
C interfaces
鈥?4 UART asynchronous serial communications
interfaces
鈥?3 BSPI synchronous serial interfaces
鈥?Up to 3 CAN interfaces (2.0B Active)
10-bit A/D Converter
鈥?12/16 channels
鈥?Conversion time: min 3碌s, range: 0 to 5V
Development Tools Support
鈥?JTAG interface
Table 1. Device Summary
Features
FLASH memory - bytes
RAM - bytes
Peripheral Functions
CAN Peripherals
Operating Voltage
Operating Temperature
Packages
T=TQFP144
20 x 20
H=LFBGA144
10 x10
STR730FZx
128K
256K
STR735FZx
128K
256K
STR731FVx
64K
128K
256K
16K
6 TIM Timers, 72 I/Os, 18 Wake-Up lines,
12 ADC channels
3
4.5 to 5.5V (optional 1.8V for core)
-40 to +105掳C
T=TQFP100
14x14
0
STR736FVx
64K
128K
256K
16K
10 TIM Timers, 112 I/Os, 32
Wake-Up lines, 16 ADC channels
3
0
Rev. 1
July 2005
This is preliminary information on a new product now in development. Details are subject to change without notice.
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