ClockWorks鈩?/div>
SY89809L
DESCRIPTION
The SY89809L is a High-Performance Bus Clock Driver
with 9 differential HSTL (High-Speed Transceiver Logic)
output pairs. The part is designed for use in low-voltage
(3.3V/1.8V) applications which require a large number of
outputs to drive precisely aligned, ultralow skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low-Voltage Positive-Emitter-Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
The SY89809L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)鈥攑erformance
previously unachievable in a standard product having such
a high number of outputs. The SY89809L is available in a
single space saving package, enabling a lower overall cost
solution.
power
s
LVPECL and HSTL inputs
s
9 differential HSTL (low-voltage swing) output pairs
s
HSTL outputs drive 50
鈩?/div>
to ground with no
offset voltage
s
500MHz maximum clock frequency
s
Low part-to-part skew (200ps max.)
s
Low pin-to-pin skew (50ps max.)
s
Available in 32-pin TQFP package
PIN CONFIGURATION
VCCO
VCCO
Q0
Q2
Q0
VCCI
HSTL_CLK
HSTL_CLK
CLK_SEL
LVPECL_CLK
LVPECL_CLK
GND
OE
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
24
23
22
Q1
Q2
Q1
VCCO
Q3
Q3
Q4
Q4
Q5
Q5
VCCO
Top View
TQFP
T32-1
APPLICATIONS
s
High-performance PCs
s
Workstations
s
Parallel processor-based systems
s
Other high-performance computing
s
Communications
21
20
19
18
17
9 10 11 12 13 14 15 16
VCCO
PIN NAMES
Pin
HSTL_CLK, /HSTL_CLK
LVPECL_CLK, /LVPECL_CLK
CLK_SEL
OE
Q
0
-Q
8
, /Q
0
-/Q
8
GND
V
CCI
V
CCO
Function
Differential HSTL Inputs
VCCO
Q8
Q8
Q7
Q7
Q6
Q6
LOGIC SYMBOL
CLK_SEL
HSTL_CLK
Differential LVPECL Inputs
Input CLK Select (LVTTL)
Output Enable (LVTTL)
Differential HSTL Outputs
Ground
V
CC
Core
V
CC
Output
HSTL_CLK
0
9
9
Q0 鈥?Q8
Q0 鈥?Q8
LVPECL_CLK
1
LVPECL_CLK
LEN
Q
OE
D
Rev.: A
Amendment: /0
1
Issue Date: March 2000
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