SST89C58 Datasheet

  • SST89C58

  • FlashFlex51 MCU

  • 367.69KB

  • SST   SST

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FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
T
ABLE
3
C
: W
ATCHDOG
T
IMER
SFR
S
Watchdog Timer
Control
WDTD Watchdog Timer
Data/Reload
* = Bit Addressable SFRs
WDTC*
C0h
86h
-
-
-
-
WDRE
WDRL
WDTS
WDT
SWDT
X0h
00h
344 PGM T3C.1
1
2
3
Watchdog Timer Control Register (WDTC)
Location
0C0h
Symbol
WDRE
7
鈥?/div>
6
鈥?/div>
5
鈥?/div>
4
鈥?/div>
3
WDRE
2
WDTS
1
WDT
0
SWDT
Reset Value
00000000b
4
5
6
7
8
9
10
11
Function
Watchdog timer reset enable.
1: Enable watchdog timer reset.
2: Disable watchdog timer reset.
Watchdog timer reset flag.
1: Hardware sets the flag on watchdog overflow.
0: External hardware reset clears the flag.
Flag can also be cleared by writing a 1.
Flag survives if chip reset happened because of watchdog timer overflow.
Watchdog timer refresh.
1: Software sets the bit to force a watchdog timer refresh.
0: Hardware resets the bit when refresh is done.
Start watchdog timer.
1: Start WDT.
0: Stop WDT.
WDTS
WDT
SWDT
Watchdog Timer Data/Reload Register (WDTD)
Location
086h
7
6
5
4
3
2
1
0
Reset Value
00000000b
Watchdog Timer Data/Reload
12
13
14
15
16
Symbol
WDTD
Function
Initial/Reload value in Watchdog Timer.
漏 2000 Silicon Storage Technology, Inc.
17
344-2 8/00

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