FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
TSU
RST
TES
PSEN#
TADS
ALE/PROG#
TPROG
EA#
TCE
P3[3]
TDH
1
2
3
4
5
0001b
P3[7:6], P2[7:6]
6
344 ILL F03.4
7
F
IGURE
11: C
HIP
-E
RASE
Erase both flash memory blocks. Security lock is ignored and the security bits are erased too.
8
9
TSU
RST
TES
10
11
TPROG
TDH
PSEN#
TADS
ALE/PROG#
EA#
TBE
P3[3]
12
13
14
344 ILL F04.5
P3[7:6], P2[7:6]
P3[5:4], P2[5:0]
1101b
AH
15
16
F
IGURE
12: B
LOCK
-E
RASE
Erase one of the flash memory blocks, if the security lock is not activated on that flash memory block. The highest
address bits A[15:12] determines which block is erased. For example, if A15 is 鈥?鈥? primary flash memory block
is erased. If A[15:12] = 鈥淔h鈥? the secondary block is erased.
漏 2000 Silicon Storage Technology, Inc.
23
344-2 8/00