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SST89C58 Datasheet

  • SST89C58

  • FlashFlex51 MCU

  • 367.69KB

  • SST   SST

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FlashFlex51 MCU
SST89C54 / SST89C58
Preliminary Specifications
MEMORY ORGANIZATION
The SST89C54/58 have separate address spaces for
program and data memory.
Program Memory
There are two internal flash memory blocks in the
SST89C54/58. The primary flash memory Block 0 has
16/32 KByte and occupies the address space 0000h to
3FFFh/7FFFh. The secondary flash memory Block 1 has
4 KByte and occupies the address space F000h to
FFFFh.
The 16/32K x8 primary SuperFlash block is organized as
128/256 uniform sectors with sector address from A15 to
A7. Each sector contains 2 rows with row address from
A15 to A6. Each row has 64 Bytes with byte address from
A5 to A0.
The 4K x8 secondary SuperFlash block is organized as
64 uniform sectors with sector address from A15 to A6.
Each sector contains 2 rows with row address from A15
to A5. Each row contains 32 Bytes with byte address
from A4 to A0. Figure 4 shows the sector organization for
SST89C54/58.
When internal code operation is enabled (EA# = 1), the
primary 16/32 KByte flash memory block is always
visible to the program counter for code fetching. Figures
5 and 6 show the program memory organizations for the
SST89C54/58.
When internal code operation is enabled (EA# = 1), the
secondary 4 KByte flash memory block is selectively
visible for code fetching. The secondary block is always
accessible through the SuperFlash mailbox registers:
SFCM, SFCF, SFAL, SFAH, SFDT and SFST. When bit
7 of the SuperFlash Configuration mailbox register
(SFCF[7]), SFR address location B1h, is set, the second-
ary 4 KByte block will be visible by program counter.
7FFFh
Sector 255
7F80h
FFFFh
Sector 63
FFC0h
89C58
4000h
3FFFh
Sector 127
3F80h
89C54
007Fh
Sector 0
0000h
Block 0 (16/32 KByte)
Primary
F000h
F03Fh
Sector 0
Block 1 (4 KByte)
Secondary
344 ILL F47.6
F
IGURE
4: S
ECTOR
O
RGANIZATION
漏 2000 Silicon Storage Technology, Inc.
8
344-2 8/00

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