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MAX1545数据手册封面

MAX1545 Datasheet

  • MAX1545

  • dual-phase, Quick-PWM™, step-down controllers

  • 813.95KB

  • Maxim   Maxim

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Dual-Phase, Quick-PWM Controllers for
Programmable CPU Core Power Supplies
MAX1519/MAX1545
Table 1. Component Selection for Standard Multiphase Applications*
DESIGNATION
Input Voltage Range
VID Output Voltage
(D4鈥揇0)
Suspend Voltage
(SUS, S0鈥揝1)
Maximum Load Current
Number of Phases (畏
TOTAL
)
Inductor (per phase)
Switching Frequency
High-Side MOSFET
(N
H
, per phase)
Low-Side MOSFET
(N
L
, per phase)
Total Input Capacitance (C
IN
)
Total Output Capacitance
(C
OUT
)
Current-Sense Resistor
(R
SENSE
, per phase)
MAX1519/MAX1545
2-PHASE DESKTOP P4
Circuit of Figure 1
7V to 24V
1.5V
(CODE = GND, D4鈥揇0 = 01110)
Not Used
(SUS = GND)
60A
Two phases
(1) MAX1519/MAX1545
0.6碌H
Panasonic ETQP1H0R6BFA
300kHz (TON = REF)
Siliconix (1) Si7886DP
International Rectifier (2) IRF6604
Siliconix (2) Si7442DP or
International Rectifier (2) IRF6603
(6) 10碌F, 25V
Taiyo Yuden TMK432BJ106KM or
TDK C4532X5R1E106M
(4) 680碌F, 2.5V
Sanyo 2R5TPD680M
1.0m鈩?/div>
Panasonic ERJM1WTJ1M0U
MAX1519/MAX1545
4- PHASE DESKTOP P4
Circuit of Figure 12
7V to 24V
1.5V
(CODE = GND, D4鈥揇0 = 01110)
Not Used
(SUS = GND)
60A
Four phases
(1) MAX1519/MAX1545 + (2) MAX1980
0.7碌H Panasonic ETQP2H0R7BFA or
0.8碌H Sumida CDEP105L-0R8
300kHz (TON = REF)
International Rectifier (1) IRF7811W or
Fairchild (1) FDS6694
Fairchild (2) FDS6688 or
Siliconix (1) Si7442DP
(6) 10碌F, 25V
Taiyo Yuden TMK432BJ106KM or
TDK C4532X5R1E106M
(4) 680碌F, 2.5V
Sanyo 2R5TPD680M
1.5m鈩?/div>
Panasonic ERJM1WTJ1M5U
*Contact
Intel for the Mobile P4 specifications and contact Maxim for a reference schematic.
Power-Up Sequence
The MAX1519/MAX1545 are enabled when
SHDN
is
driven high (Figure 2). The reference powers up first.
Once the reference exceeds its undervoltage lockout
threshold, the PWM controller evaluates the DAC target
and starts switching.
For the MAX1519/MAX1545, the slew-rate controller
ramps up the output voltage in 25mV increments to the
proper operating voltage (see Tables 3 and 4) set by
either D0鈥揇4 (SUS = GND) or S0鈥揝1 (SUS = REF or
high). The ramp rate is set with the R
TIME
resistor (see
the
Output Voltage Transition Timing
section). The con-
troller pulls VROK low until at least 3ms after the
MAX1519/MAX1545 reach the target DAC code.
Shutdown
When
SHDN
goes low, the MAX1519/MAX1545 enter
low-power shutdown mode. VROK is pulled low imme-
diately, and the output voltage ramps down to 0V in
25mV increments at 4 times the clock rate set by
R
TIME
:
t
SHDN
鈮?/div>
铮?/div>
V
DAC
铮?/div>
f
SLEW
铮?/div>
V
LSB
铮?/div>
铮?/div>
铮?/div>
4
______________________________________________________________________________________
17

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