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NR6(0) 鈥?Swap B1 and B2
When NR6(0) is 0, the timeslot assigned positions of the B1 and B2 channel data input and output
via the IDL2 interface functions normally. When NR6(0) is set to 1, the timeslot positions of the B1
and B2 channels are reversed; i.e., data entering the device on IDL2 Rx in the B1 timeslot is modulated
onto the B2 timeslot, on the S/T loop. Data demodulated from the B2 timeslot from the S/T loop is
output on IDL2 Tx in the B1 timeslot. The situation is analogous for B2 data entering the device on
IDL2 Rx. This feature is useful in applications where a particular device (such as a codec filter) is
hard鈥搘ired to a particular IDL2 timeslot and needs to gain access to the opposite B channel timeslot.
NR6(0) has no effect during a 2B+D IDL2 loopback. Note that NR6(0) is a read/write bit.
NOTE: When NR6(0) is set, the B channel used on the IDL bus must be enabled before being output
on the S/T loop. For example, if data entering the device on Din in the B1 channel is modulated onto
the B2 channel on the S/T loop, then NR5(3) has to be set. On the MC145474/75, this is done differently.
For the same example, NR5(2) is set instead of NR5(3).
8.9
NR7
NR7 is a pointer register used when accessing a 16鈥揵yte鈥搘ide register. This pointer register will con-
tain the address of the byte鈥搘ide register to be read from or written to, on the following SCP transaction.
This nibble register is not shown on the register map, as it is not programmable.
Freescale Semiconductor, Inc...
8鈥?
MC145574
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