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MC145574数据手册封面

MC145574 Datasheet

  • MC145574

  • ISDN S/T-Interface Transceiver

  • 658.40KB

  • Motorola   Motorola

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Freescale Semiconductor, Inc.
BR11(0) 鈥?Transmit 96 kHz Test Signal
This bit is a read/write bit and is applicable to both NT and TE modes of operation. When this bit
is 0, the MC145574 functions normally. When this bit is 1, the device transmits a 96 kHz square wave
test signal on TxP/TxN. This test signal can be used for test purposes. This 96 kHz test signal qualifies
as a 鈥淭ransmit INFO X鈥?state. Correspondingly, the MC145574 receiving the 96 kHz test signal will
be in the 鈥淩eceive INFO X鈥?state. Application of a hardware or software reset will reset this bit to 0.
9.14
BR12
(7)
BR12
Reserved
(6)
Reserved
(5)
Reserved
(4)
Reserved
(3)
Reserved
(2)
Reserved
(1)
Reserved
(0)
Reserved
Byte register 12 is reserved for Motorola use only.
Freescale Semiconductor, Inc...
9.15
BR13
(7)
BR13
NT: NT1
Star Mode
TE: Not
Applicable
(6)
Reserved
(5)
IDL2 Clock
Speed
(MSB)
(4)
Mute B2 on
IDL2 Tx
(3)
Mute B1 on
IDL2 Tx
(2)
NT: Force
Echo
Channel to
Zero
TE: Not
Applicable
(1)
NT: Not
Applicable
TE: Force
IDL2 Tx
(0)
Reserved
BR13(7) 鈥?NT: NT1 Star Mode
TE: Not Applicable
This bit is a read/write bit and is only applicable to the NT mode of operation. When this bit is 0, the
device functions normally. When this bit is 1, the device is configured for NT1 Star mode operation.
Refer to Section 11 for a detailed description of this mode. This bit is reset to 0 by application of either
a hardware or software reset.
BR13(6)
This bit has no function and is reserved for Motorola use only.
BR13(5) 鈥?IDL2 Clock Speed (MSB)
This bit is a read/write bit and is applicable to both NT and TE modes of operation. BR13(5), in conjunc-
tion with BR7(2), determines the IDL2 CLK frequency when operating in the IDL2 master mode. BR7(2)
is the LSB and BR13(5) is the MSB. The code corresponding to each IDL2 clock frequency is as shown
in the description for BR7(2). Application of either a hardware or a software reset will reset this bit
to 0. See Table 9鈥?.
BR13(4) 鈥?Mute B2 on IDL2
This bit is a read/write bit and is applicable to both NT and TE modes of operation. When this bit
is 0, the device functions normally. When this bit is 1, the data transmitted on the B2 channel on IDL2
Tx will be forced to the 鈥渋dle 1s鈥?condition. This feature is primarily used in the NT1 Star mode operation.
Refer to Section 11 for a detailed description of this mode. Application of a hardware or software reset
resets this bit to 0.
BR13(3) 鈥?Mute B1 on IDL2
This bit is a read/write bit and is applicable to both NT and TE modes of operation. When this bit
is 0, the device functions normally. When this bit is 1, the data transmitted on the B1 channel on IDL2
Tx will be forced to the 鈥渋dle 1s鈥?condition. This feature is primarily used in the NT1 Star mode operation.
MC145574
For More Information On This Product,
Go to: www.freescale.com
9鈥?2
MOTOROLA

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