卤80V Fault-Protected, 2Mbps, Low Supply
Current CAN Transceivers
MAX3050/MAX3057
TIMING CHARACTERISTICS
(V
CC
= +5V 卤10%, R
L
= 60鈩? C
L
= 100pF, T
A
= T
MIN
to T
MAX
. Typical values are at V
CC
= +5V and T
A
= +25掳C.) (Figures 1, 2, and 3)
PARAMETER
TIMING
V
RS
= 0 (2Mbps)
Minimum Bit Time
t
BIT
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
Delay TXD to Bus Active
Delay TXD to Bus Inactive
t
ONTXD
t
OFFTXD
V
RS
= 0
V
RS
= 0
V
RS
= 0 (2Mbps)
Delay TXD to Receiver Active
t
ONRXD
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
V
RS
= 0 (2Mbps)
Delay TXD to Receiver Inactive
t
OFFRXD
R
RS
= 24k鈩?(500kbps)
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
R
RS
= 24k鈩?(500kbps)
Differential Output Slew Rate
Bus Dominant to RXD Low
Time to Wake Up: CANH > 9V
Time to Sleep Mode when Bus Is
Recessive
t
WAKE
t
SHDN
SR
R
RS
= 100k鈩?(125kbps)
R
RS
= 180k鈩?(62.5kbps)
Standby mode
SHDN
= GND, V
TXD
= V
CC
(MAX3050)
C
SHDN
= 100nF (MAX3050)
10
14
7
1.6
10
10
47
碌s
碌s
ms
V/碌s
0.5
2
8
25
40
75
120
0.4
1.6
5.0
130
0.45
1.6
5.0
碌s
ns
碌s
ns
ns
ns
碌s
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Note 1:
As defined by ISO, bus value is one of two complementary logical values: dominant or recessive. The dominant value repre-
sents the logical 1 and the recessive represents the logical 0. During the simultaneous transmission of the dominant and
recessive bits, the resulting bus value is dominant. For MAX3050 and MAX3057 values, see the truth table in the
Transmitter
and
Receiver
sections.
4
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