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MM74HC4046 Datasheet

  • MM74HC4046

  • CMOS Phase Lock Loop

  • 437.57KB

  • Fairchild

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MM74HC4046
Absolute Maximum Ratings
(Note 1)
(Note 2)
Supply Voltage (V
CC
)
DC Input Voltage (V
IN
)
DC Output Voltage (V
OUT
)
Clamp Diode Current (I
IK
, I
OK
)
DC Output Current per pin (I
OUT
)
DC V
CC
or GND Current, per pin (I
CC
)
Storage Temperature Range (T
STG
)
Power Dissipation (P
D
)
(Note 3)
S.O. Package only
Lead Temperature (T
L
)
(Soldering 10 seconds)
260
掳
C
600 mW
500 mW
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
DC Input or Output Voltage
(V
IN
, V
OUT
)
Operating Temperature Range (T
A
)
Input Rise or Fall Times
(t
r
, t
f
) V
CC
=
2.0V
V
CC
=
4.5V
V
CC
=
6.0V
1000
500
400
ns
ns
ns
0
V
CC
V
2
Max
6
Units
V
鈭?/div>
0.5 to
+
7.0V
鈭?/div>
1.5 to V
CC
+
1.5V
鈭?/div>
0.5 to V
CC
+
0.5V
卤
20 mA
卤
25 mA
卤
50 mA
鈭?/div>
65
掳
C
+
150
掳
C
鈭?/div>
40
+
85
掳
C
Note 1:
Maximum Ratings are those values beyond which damage to the
device may occur.
Note 2:
Unless otherwise specified all voltages are referenced to ground.
Note 3:
Power Dissipation temperature derating 鈥?plastic 鈥淣鈥?package:
鈭?/div>
12 mW/掳C from 65掳C to 85掳C.
DC Electrical Characteristics
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
(Note 4)
V
CC
2.0V
4.5V
6.0V
2.0V
4.5V
6.0V
T
A
=
25掳C
Typ
1.5
3.15
4.2
0.5
1.35
1.8
2.0
4.5
6.0
4.2
5.7
0
0
0
0.2
0.2
20
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
卤0.1
50
卤0.5
30
600
80
1500
T
A
= 鈭?0
to 85掳C T
A
= 鈭?5
to 125掳C
Guaranteed Limits
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
卤1.0
80
卤5.0
130
2400
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
卤1.0
100
卤10
160
3000
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
碌A
碌A
碌A
碌A
碌A
Conditions
V
IN
=
V
IH
or V
IL
|I
OUT
|
鈮?/div>
20
碌A
2.0V
4.5V
6.0V
V
IN
=
V
IH
or V
IL
|I
OUT
|
鈮?/div>
4.0 mA
|I
OUT
|
鈮?/div>
5.2 mA
4.5V
6.0V
2.0V
4.5V
6.0V
V
IN
=
V
IH
or V
IL
|I
OUT
|
鈮?/div>
4.0 mA
|I
OUT
|
鈮?/div>
5.2 mA
4.5V
6.0V
6.0V
6.0V
6.0V
6.0V
6.0V
V
OL
Maximum Low Level
Output Voltage
V
IN
=
V
IH
or V
IL
|I
OUT
|
鈮?/div>
20
碌A
I
IN
I
IN
I
OZ
I
CC
Maximum Input Current (Pins 3,5,9) V
IN
=
V
CC
or GND
Maximum Input Current (Pin 14)
Maximum 3-STATE Output
Leakage Current (Pin 13)
Maximum Quiescent
Supply Current
V
IN
=
V
CC
or GND
I
OUT
=
0
碌A
V
IN
=
V
CC
or GND
Pin 14 Open
V
IN
=
V
CC
or GND
V
OUT
=
V
CC
or GND
Note 4:
For a power supply of 5V
卤10%
the worst case output voltages (V
OH
, and V
OL
) occur for HC at 4.5V. Thus the 4.5V values should be used when
designing with this supply. Worst case V
IH
and V
IL
occur at V
CC
=
5.5V and 4.5V respectively. (The V
IH
value at 5.5V is 3.85V.) The worst case leakage cur-
rent (I
IN
, I
CC
, and I
OZ
) occur for CMOS at the higher voltage and so the 6.0V values should be used.
3
www.fairchildsemi.com

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