Preliminary W77E516
Data Pointer High1
Bit:
7
6
5
4
3
2
1
0
DPH1.7 DPH1.6 DPH1.5 DPH1.4 DPH1.3 DPH1.2 DPH1.1 DPH1.0
Mnemonic: DPH1
Address: 85h
This is the high byte of the new additional 16-bit data pointer that has been added to the W77E516.
The user can switch between DPL, DPH and DPL1, DPH1 simply by setting register DPS = 1. The
instructions that use DPTR will now access DPL1 and DPH1 in place of DPL and DPH. If they are
not required they can be used as conventional register locations by the user.
Data Pointer Select
Bit:
7
-
Mnemonic: DPS
6
-
5
-
4
-
3
-
2
-
Address: 86h
1
-
0
DPS.0
DPS.0: This bit is used to select either the DPL, DPH pair or the DPL1, DPH1 pair as the
activeData Pointer. When set to 1, DPL1, DPH1 will be selected, otherwise DPL, DPH will
be selected.
DPS.1
鈭?/div>
7: These bits are reserved, but will read 0.
Power Control
Bit:
7
SM0D
Mnemonic: PCON
6
SMOD0
5
-
4
-
3
GF1
2
GF0
Address: 87h
1
PD
0
IDL
SMOD : This bit doubles the serial port baud rate in mode 1, 2, and 3 when set to 1.
SMOD0: Framing Error Detection Enable: When SMOD0 is set to 1, then SCON.7(SCON1.7)
indicates a Frame Error and acts as the FE(FE_1) flag. When SMOD0 is 0, then
SCON.7(SCON1.7) acts as per the standard 8052 function.
GF1-0: These two bits are general purpose user flags.
PD: Setting this bit causes the W77E516 to go into the POWER DOWN mode. In this mode all the
clocks are stopped and program execution is frozen.
IDL: Setting this bit causes the W77E516 to go into the IDLE mode. In this mode the clocks to the
CPU are stopped, so program execution is frozen. But the clock to the serial, timer and
interrupt blocks is not stopped, and these blocks continue operating.
Timer Control
Bit:
7
TF1
Mnemonic: TCON
6
TR1
5
TF0
4
TR0
3
IE1
2
IT1
Address: 88h
Publication Release Date: August 16, 2002
Revision A1
1
IE0
0
IT0
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