Preliminary W77E516
Interrupt Priority
Bit:
7
-
Mnemonic: IP
6
PS1
5
PT2
4
PS
3
PT1
2
PX1
1
PT0
0
PX0
Address: B8h
IP.7: This bit is un-implemented and will read high.
PS1: This bit defines the Serial port 1 interrupt priority. PS = 1 sets it to higher priority level.
PT2: This bit defines the Timer 2 interrupt priority.
PT2 = 1 sets it to higher priority level.
PS: This bit defines the Serial port 0 interrupt priority. PS = 1 sets it to higher priority level.
PT1: This bit defines the Timer 1 interrupt priority.
PT1 = 1 sets it to higher priority level.
PX1:This bit defines the External interrupt 1 priority. PX1 = 1 sets it to higher priority level.
PT0: This bit defines the Timer 0 interrupt priority.
PT0 = 1 sets it to higher priority level.
PX0:This bit defines the External interrupt 0 priority. PX0 = 1 sets it to higher priority level.
Slave Address Mask Enable
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADEN
Address: B9h
SADEN: This register enables the Automatic Address Recognition feature of the Serial port 0.
When a bit in the SADEN is set to 1, the same bit location in SADDR will be compared
with the incoming serial data. When SADEN.n is 0, then the bit becomes a "don't care" in
the comparison. This register enables the Automatic Address Recognition feature of the
Serial port 0. When all the bits of SADEN are 0, interrupt will occur for any incoming
address.
Slave Address Mask Enable 1
Bit:
7
6
5
4
3
2
1
0
Mnemonic: SADEN1
Address: BAh
SADEN1: This register enables the Automatic Address Recognition feature of the Serial port 1.
When a bit in the SADEN1 is set to 1, the same bit location in SADDR1 will be
compared with the incoming serial data. When SADEN1.n is 0, then the bit becomes a
"don't care" in the comparison. This register enables the Automatic Address Recognition
feature of the Serial port 1. When all the bits of SADEN1 are 0, interrupt will occur for
any incoming address.
Serial Port Control 1
Bit:
7
SM0_1/FE_1
6
SM1_1
5
SM2_1
4
REN_1
3
TB8_1
2
RB8_1
1
TI_1
0
RI_1
Mnemonic: SCON1
Address: C0h
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