W77E516 Datasheet

  • W77E516

  • uC-Based Consumer IC > Controller IC > 8-Bit Microcontrolle...

  • 1107.54KB

  • Winbond

扫码查看芯片数据手册

上传产品规格书

PDF预览

Preliminary W77E516
level on the external pin re-starts the oscillator. Then device executes the interrupt service routine
for the corresponding external interrupt. After the interrupt service routine is completed, the
program execution returns to the instruction after the one which put the device into Power Down
mode and continues from there. When RGSL(EXIF.1) bit is set to 1, the CPU will use the internal
RC oscillator instead of crystal to exit Power Down mode. The microcontroller will automatically
switch from RC oscillator to crystal after clock is stable. The RC oscillator runs at approximately 2
鈭?/div>
4 MHz. Using RC oscillator to exit from Power Down mode saves the time for waiting crystal start-
up. It is useful in the low power system which usually be awakened from a short operation then
returns to Power Down mode.
Table 5. Status of external pins during Idle and Power Down
MODE
Idle
Idle
Power Down
Power Down
PROGRAM
MEMORY
Internal
External
Internal
External
ALE
1
1
0
0
PSEN
1
1
0
0
PORT0
Data
Float
Data
Float
PORT1
Data
Data
Data
Data
PORT2
Data
Address
Data
Data
PORT3
Data
Data
Data
Data
Reset Conditions
The user has several hardware related options for placing the W77E516 into reset condition. In
general, most register bits go to their reset value irrespective of the reset condition, but there are a few
flags whose state depends on the source of reset. The user can use these flags to determine the
cause of reset using software. There are three ways of putting the device into reset state. They are
External reset, Power on reset and Watchdog reset.
External Reset
The device continuously samples the RST pin at state C4 of every machine cycle. Therefore the
RST pin must be held for at least 2 machine cycles to ensure detection of a valid RST high. The
reset circuitry then synchronously applies the internal reset signal. Thus the reset is a synchronous
operation and requires the clock to be running to cause an external reset.
Once the device is in reset condition, it will remain so as long as RST is 1. Even after RST is
deactivated, the device will continue to be in reset state for up to two machine cycles, and then
begin program execution from 0000h. There is no flag associated with the external reset condition.
However since the other two reset sources have flags, the external reset can be considered as the
default reset if those two flags are cleared.
Watchdog Timer Reset
The Watchdog timer is a free running timer with programmable time-out intervals. The user can
clear the watchdog timer at any time, causing it to restart the count. When the time-out interval is
reached an interrupt flag is set. If the Watchdog reset is enabled and the watchdog timer is not
cleared, then 512 clocks from the flag being set, the watchdog timer will generate a reset. This
places the device into the reset condition. The reset condition is maintained by hardware for two
machine cycles. Once the reset is removed the device will begin execution from 0000h.
- 51 -
Publication Release Date: August 16, 2002
Revision A1

W77E516相关型号PDF文件下载

扫码下载APP,
一键连接广大的电子世界。

在线人工客服

买家服务:
卖家服务:

0571-85317607

客服在线时间周一至周五
9:00-17:30

关注官方微信号,
第一时间获取资讯。

建议反馈

联系人:

联系方式:

按住滑块,拖拽到最右边
>>
感谢您向阿库提出的宝贵意见,您的参与是维库提升服务的动力!意见一经采纳,将有感恩红包奉上哦!