PIC16F819 Datasheet

  • PIC16F819

  • 18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Tech...

  • 68.31KB

  • 176页

  • MICROCHIP   MICROCHIP

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PIC16F818/819
2.2
Data Memory Organization
The data memory is partitioned into multiple banks that
contain the General Purpose Registers and the Special
Function Registers. Bits RP1 (STATUS<6>) and RP0
(STATUS<5>) are the bank select bits.
RP1:RP0
00
01
10
11
Bank
0
1
2
3
Each bank extends up to 7Fh (128 bytes). The lower
locations of each bank are reserved for the Special
Function Registers. Above the Special Function Regis-
ters are General Purpose Registers, implemented as
static RAM. All implemented banks contain SFRs.
Some 鈥渉igh use鈥?SFRs from one bank may be mirrored
in another bank for code reduction and quicker access
(e.g., the Status register is in Banks 0-3).
Note:
EEPROM data memory description can be
found in
Section 3.0 鈥淒ata EEPROM and
Flash Program Memory鈥?/span>
of this data
sheet.
2.2.1
GENERAL PURPOSE REGISTER
FILE
The register file can be accessed either directly or
indirectly through the File Select Register, FSR.
DS39598D-page 10
Preliminary
铮?/div>
2003 Microchip Technology Inc.

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