PIC16F819 Datasheet

IC型号：
PIC16F819
PDF描述：
18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Tech...
文件大小：
68.31KB
PDF页数：
176页
芯片厂家：
MICROCHIP

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PIC16F818/819

TABLE 2-1:

Address

Bank 2

100h

(1)

101h

102h

103h

(1)

104h

(1)

105h

106h

107h

108h

109h

INDF

TMR0

PCL

STATUS

FSR

鈥?/div>

PORTB

鈥?/div>

Addressing this location uses contents of FSR to address data memory (not a physical register)

Timer0 Module鈥檚 Register

Program Counter鈥檚 (PC) Least Significant Byte

IRP

RP1

RP0

0000 0000

xxxx xxxx

0000 0000

0001 1xxx

xxxx xxxx

鈥?/div>

xxxx xxxx

鈥?/div>

TMR0IE

Write Buffer for the upper 5 bits of the Program Counter

INTE

RBIE

TMR0IF

INTF

RBIF

---0 0000

0000 000x

xxxx xxxx

--xx xxxx

EEPROM Address Register High Byte

---- -xxx

鈥?/div>

Name

SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR, BOR

Details on

page:

Indirect Data Memory Address Pointer

Unimplemented

PORTB Data Latch when written; PORTB pins when read

Unimplemented

鈥?/div>

GIE

鈥?/div>

PEIE

10Ah

(1,2)

PCLATH

10Bh

(1)

10Ch

10Dh

10Eh

10Fh

Bank 3

180h

(1)

181h

182h

(1)

183h

(1)

184h

(1)

185h

186h

187h

188h

189h

INDF

OPTION

PCL

STATUS

FSR

鈥?/div>

TRISB

鈥?/div>

INTCON

EEDATA

EEADR

EEDATH

EEADRH

EEPROM Data Register Low Byte

EEPROM Address Register Low Byte

鈥?/div>

EEPROM Data Register High Byte

鈥?/div>

Addressing this location uses contents of FSR to address data memory (not a physical register)

RBPU

INTEDG

T0CS

T0SE

PSA

PS2

PS1

PS0

0000 0000

1111 1111

0000 0000

鈥?/div>

Program Counter鈥檚 (PC) Least Significant Byte

IRP

RP1

RP0

0001 1xxx

xxxx xxxx

鈥?/div>

1111 1111

鈥?/div>

Indirect Data Memory Address Pointer

Unimplemented

PORTB Data Direction Register

Unimplemented

鈥?/div>

GIE

EEPGD

鈥?/div>

PEIE

鈥?/div>

TMR0IE

鈥?/div>

Write Buffer for the upper 5 bits of the Program Counter

INTE

FREE

RBIE

WRERR

TMR0IF

WREN

INTF

RBIF

18Ah

(1,2)

PCLATH

18Bh

(1)

18Ch

18Dh

18Eh

18Fh

Legend:

Note 1:

INTCON

EECON1

EECON2

鈥?/div>

---0 0000

0000 000x

x--x x000

---- ----

0000 0000

EEPROM Control Register 2 (not a physical register)

Reserved; maintain clear

= unknown,

= unchanged,

= value depends on condition, - = unimplemented, read as 鈥?鈥?

= reserved.

Shaded locations are unimplemented, read as 鈥?鈥?

These registers can be addressed from any bank.

The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>, whose contents are

transferred to the upper byte of the program counter.

Pin 5 is an input only; the state of the TRISA5 bit has no effect and will always read 鈥?鈥?

铮?/div>

2003 Microchip Technology Inc.

Preliminary

DS39598D-page 15

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