PIC16F819 Datasheet

  • PIC16F819

  • 18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Tech...

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  • 176页

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PIC16F818/819
2.2.2.5
PIR1 Register
Note:
This register contains the individual flag bits for the
peripheral interrupts.
Interrupt flag bits are set when an interrupt
condition occurs regardless of the state of
its corresponding enable bit, or the global
enable bit, GIE (INTCON<7>). User
software should ensure the appropriate
interrupt flag bits are clear prior to
enabling an interrupt.
REGISTER 2-5:
PIR1: PERIPHERAL INTERRUPT FLAG REGISTER 1 (ADDRESS 0Ch)
U-0
鈥?/div>
bit 7
R/W-0
ADIF
U-0
鈥?/div>
U-0
鈥?/div>
R/W-0
SSPIF
R/W-0
CCP1IF
R/W-0
TMR2IF
R/W-0
TMR1IF
bit 0
bit 7
bit 6
Unimplemented:
Read as 鈥?鈥?/div>
ADIF:
A/D Converter Interrupt Flag bit
1
= An A/D conversion completed
0
= The A/D conversion is not complete
Unimplemented:
Read as 鈥?鈥?/div>
SSPIF:
Synchronous Serial Port (SSP) Interrupt Flag bit
1
= The SSP interrupt condition has occurred and must be cleared in software before returning
from the Interrupt Service Routine. The conditions that will set this bit are a transmission/
reception has taken place.
0
= No SSP interrupt condition has occurred
CCP1IF:
CCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode.
TMR2IF:
TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
TMR1IF:
TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
Legend:
R = Readable bit
- n = Value at POR
W = Writable bit
鈥?鈥?= Bit is set
U = Unimplemented bit, read as 鈥?鈥?/div>
鈥?鈥?= Bit is cleared
x = Bit is unknown
bit 5-4
bit 3
bit 2
bit 1
bit 0
DS39598D-page 20
Preliminary
铮?/div>
2003 Microchip Technology Inc.

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