PIC16F819 Datasheet

  • PIC16F819

  • 18/20-Pin Enhanced Flash Microcontrollers with nanoWatt Tech...

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  • 176页

  • MICROCHIP   MICROCHIP

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PIC16F818/819
3.8
Protection Against Spurious Write
3.9
Operation During Code-Protect
There are conditions when the device should not write
to the data EEPROM memory. To protect against spu-
rious EEPROM writes, various mechanisms have been
built-in. On power-up, WREN is cleared. Also, the
Power-up Timer (72 ms duration) prevents an
EEPROM write.
The write initiate sequence and the WREN bit together
help prevent an accidental write during brown-out,
power glitch or software malfunction.
When the data EEPROM is code-protected, the micro-
controller can read and write to the EEPROM normally.
However, all external access to the EEPROM is
disabled. External write access to the program memory
is also disabled.
When program memory is code-protected, the microcon-
troller can read and write to program memory normally as
well as execute instructions. Writes by the device may be
selectively inhibited to regions of the memory depending
on the setting of bits, WRT1:WRT0, of the Configuration
Word (see
Section 12.1 鈥淐onfiguration Bits鈥?/span>
for addi-
tional information). External access to the memory is also
disabled.
TABLE 3-1:
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM AND
FLASH PROGRAM MEMORIES
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-on
Reset
Value on
all other
Resets
Address
10Ch
10Dh
10Eh
10Fh
18Ch
18Dh
0Dh
8Dh
Legend:
Name
EEDATA EEPROM/Flash Data Register Low Byte
EEADR
EEDATH
EEADRH
EEPROM/Flash Address Register Low Byte
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
EEPROM/Flash Data Register High Byte
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
FREE
EEIF
EEIE
鈥?/div>
WRERR
鈥?/div>
鈥?/div>
EEPROM/Flash Address
Register High Byte
WREN
鈥?/div>
鈥?/div>
WR
鈥?/div>
鈥?/div>
RD
鈥?/div>
鈥?/div>
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
--xx xxxx --uu uuuu
---- -xxx ---- -uuu
x--x x000 x--x q000
---- ---- ---- ----
---0 ---- ---0 ----
---0 ---- ---0 ----
EECON1 EEPGD
PIR2
PIE2
鈥?/div>
鈥?/div>
EECON2 EEPROM Control Register 2 (not a physical register)
x
= unknown,
u
= unchanged,
-
= unimplemented, read as 鈥?鈥?
q
= value depends upon condition.
Shaded cells are not used by data EEPROM or Flash program memory.
DS39598D-page 32
Preliminary
铮?/div>
2003 Microchip Technology Inc.

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