PIC16F818/819
EXAMPLE 6-1:
BANKSEL
MOVLW
MOVWF
BANKSEL
CLRF
BANKSEL
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
CHANGING THE PRESCALER ASSIGNMENT FROM TIMER0 TO WDT
;
;
;
;
;
;
;
Select Bank of OPTION
Select clock source and prescale value of
other than 1:1
Select Bank of TMR0
Clear TMR0 and prescaler
Select Bank of OPTION
Select WDT, do not change prescale value
OPTION
b'xx0x0xxx'
OPTION
TMR0
TMR0
OPTION
b'xxxx1xxx'
OPTION
b'xxxx1xxx'
OPTION
; Clears WDT and prescaler
; Select new prescale value and WDT
EXAMPLE 6-2:
CHANGING THE PRESCALER ASSIGNMENT FROM WDT TO TIMER0
;
;
;
;
Clear WDT and prescaler
Select Bank of OPTION
Select TMR0, new prescale
value and clock source
CLRWDT
BANKSEL OPTION
MOVLW
b'xxxx0xxx'
MOVWF
OPTION
TABLE 6-1:
Address
01h,101h
REGISTERS ASSOCIATED WITH TIMER0
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
xxxx xxxx
INTE
T0SE
RBIE TMR0IF INTF RBIF
0000 000x
PSA
PS2
PS1
PS0
1111 1111
Value on
all other
Resets
uuuu uuuu
0000 000u
1111 1111
TMR0
Timer0 Module Register
GIE
RBPU
PEIE
INTEDG
TMR0IE
T0CS
0Bh,8Bh,
INTCON
10Bh,18Bh
81h,181h
Legend:
Option
x
= unknown,
u
= unchanged,
-
= unimplemented locations read as 鈥?鈥? Shaded cells are not used by Timer0.
铮?/div>
2003 Microchip Technology Inc.
Preliminary
DS39598D-page 55
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