鈫?/div>
SSPBUF
Generate ACK Pulse
Set bit SSPIF
(SSP Interrupt occurs if enabled)
Yes
Yes
Yes
Yes
Status Bits as Data
Transfer is Received
BF
0
1
1
0
Note 1:
SSPOV
0
0
1
1
Yes
No
No
No
Yes
No
No
No
Shaded cells show the conditions where the user software did not properly clear the overflow condition.
FIGURE 10-6:
I
2
C WAVEFORMS FOR RECEPTION (7-BIT ADDRESS)
SDA
Receiving Address R/W =
0
Receiving Data
Receiving Data
ACK
ACK
ACK
A7 A6 A5 A4 A3 A2 A1
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
S
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
P
SCL
SSPIF (PIR1<3>)
Cleared in software
Bus master
terminates
transfer
BF (SSPSTAT<0>)
SSPBUF register is read
SSPOV (SSPCON<6>)
Bit SSPOV is set because the SSPBUF register is still full
ACK is not sent
FIGURE 10-7:
I
2
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
Receiving Address
R/W =
1
A1
ACK
D7
D6
D5
D4
Transmitting Data
D3
D2
D1
D0
ACK
SDA
A7
A6
A5
A4
A3
A2
SCL
S
1
2
Data is
Sampled
3
4
5
6
7
8
9
1
SCL held low
while CPU
responds to SSPIF
2
3
4
5
6
7
8
9
P
SSPIF (PIR1<3>)
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
Cleared in software
SSPBUF is written in software
From SSP Interrupt
Service Routine
Set bit after writing to SSPBUF
(the SSPBUF must be written to
before the CKP bit can be set)
DS39598D-page 78
Preliminary
铮?/div>
2003 Microchip Technology Inc.
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