PIC16F818/819
TABLE 12-4:
Register
W
INDF
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
INITIALIZATION CONDITIONS FOR ALL REGISTERS
Power-on Reset,
Brown-out Reset
xxxx xxxx
N/A
xxxx xxxx
0000h
0001
xxxx
xxx0
xxxx
---0
0000
1xxx
xxxx
0000
xxxx
0000
000x
MCLR Reset,
WDT Reset
uuuu uuuu
N/A
uuuu uuuu
0000h
000q
uuuu
uuu0
uuuu
---0
0000
quuu
(3)
uuuu
0000
uuuu
0000
000u
Wake-up via WDT or
Interrupt
uuuu uuuu
N/A
uuuu uuuu
PC + 1
(2)
uuuq
uuuu
uuuu
uuuu
---u
uuuu
quuu
(3)
uuuu
uuuu
uuuu
uuuu
uuuu
(1)
PIR1
-0-- 0000
-0-- 0000
-u-- uuuu
(1)
PIR2
---0 ----
---0 ----
---u ----
(1)
TMR1L
xxxx xxxx
uuuu uuuu
uuuu uuuu
TMR1H
xxxx xxxx
uuuu uuuu
uuuu uuuu
T1CON
--00 0000
--uu uuuu
--uu uuuu
TMR2
0000 0000
0000 0000
uuuu uuuu
T2CON
-000 0000
-000 0000
-uuu uuuu
SSPBUF
xxxx xxxx
uuuu uuuu
uuuu uuuu
SSPCON
0000 0000
0000 0000
uuuu uuuu
CCPR1L
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCPR1H
xxxx xxxx
uuuu uuuu
uuuu uuuu
CCP1CON
--00 0000
--00 0000
--uu uuuu
ADRESH
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON0
0000 00-0
0000 00-0
uuuu uu-u
OPTION
1111 1111
1111 1111
uuuu uuuu
TRISA
1111 1111
1111 1111
uuuu uuuu
TRISB
1111 1111
1111 1111
uuuu uuuu
PIE1
-0-- 0000
-0-- 0000
-u-- uuuu
PIE2
---0 ----
---0 ----
---u ----
PCON
---- --qq
---- --uu
---- --uu
OSCCON
-000 -0--
-000 -0--
-uuu -u--
OSCTUNE
--00 0000
--00 0000
--uu uuuu
PR2
1111 1111
1111 1111
1111 1111
SSPADD
0000 0000
0000 0000
uuuu uuuu
SSPSTAT
0000 0000
0000 0000
uuuu uuuu
ADRESL
xxxx xxxx
uuuu uuuu
uuuu uuuu
ADCON1
00-- 0000
00-- 0000
uu-- uuuu
EEDATA
xxxx xxxx
uuuu uuuu
uuuu uuuu
EEADR
xxxx xxxx
uuuu uuuu
uuuu uuuu
EEDATH
--xx xxxx
--uu uuuu
--uu uuuu
EEADRH
---- -xxx
---- -uuu
---- -uuu
EECON1
x--x x000
u--x u000
u--u uuuu
EECON2
---- ----
---- ----
---- ----
Legend:
u
= unchanged,
x
= unknown,
-
= unimplemented bit, read as 鈥?鈥?
q
= value depends on condition,
r
= reserved maintain clear
Note 1:
One or more bits in INTCON, PIR1 and PR2 will be affected (to cause wake-up).
2:
When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h).
3:
See Table 12-3 for Reset value for specific conditions.
DS39598D-page 94
Preliminary
铮?/div>
2003 Microchip Technology Inc.
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