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ISL5416 Datasheet

  • ISL5416

  • Four-Channel Wideband Programmable DownConverter

  • 2008.00KB

  • 71页

  • INTERSIL   INTERSIL

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ISL5416
TABLE 39. LOWER THRESHOLD, ATTENUATOR CHANGE (IWA = 0*13h)
RESET STATE = 0x00000000h
CONTROL IS SHARED FOR AIN/BIN AND FOR CIN/DIN
P(31:0)
31:30
29:16
RESERVED. Set to 0.
ATTENUATION STEP 3.
Amount to decrease the attenuation control register if the average input magnitude is below the lower threshold. 14-bit value loads
the LSBs of a 17-bit accumulator. The 3 MSBs of the 17-bit load are hard-wired to 鈥?11鈥?, so the load value should be masked from
a negative number. The MSB of the 14-bit value is weighted at 6 dB so the value at all zeros would be ~12 dB (decrease in
attenuation).
THRESHOLD 3.
Lower threshold value. If the accumulated and normalized input magnitude is below this value, the attenuation control accumulator is
adjusted by the amount programmed in bits 29:16.
FUNCTION
THIS
15:0
TABLE 40. UPPER THRESHOLD, ATTENUATOR CHANGE (IWA = 0*14h)
RESET STATE = 0x00000000h
CONTROL IS SHARED FOR AIN/BIN AND FOR CIN/DIN
P(31:0)
31:30
29:16
RESERVED. Set to 0.
FUNCTION
THIS
ATTENUATION STEP 2.
Amount to increase the attenuation control register if the average input magnitude is above the upper threshold. 14-bit value loads
the LSBs of a 17-bit accumulator. The 3 MSBs of the 17-bit load are hard-wired to 鈥?00鈥?. The MSB of the 14-bit value is weighted at
6 dB so the value at all ones would be ~12 dB (increase in attenuation).
THRESHOLD 2.
Upper threshold value. If the accumulated and normalized input magnitude is above this value, the attenuation control accumulator
is adjusted by the amount programmed in bits 29:16.
15:0
TABLE 41. IMMEDIATE THRESHOLD, ATTENUATOR GAIN (IWA = 0*15h)
RESET STATE = 0x00000000h
CONTROL IS SHARED FOR AIN/BIN AND FOR CIN/DIN
P(31:0)
31:30
29:16
RESERVED. Set to 0.
FUNCTION
THIS
ATTENUATION STEP 1.
Amount to increase the attenuation control register if the sample-by-sample input magnitude is above the immediate threshold. 14-
bit value loads the LSBs of a 17-bit accumulator. The 3 MSBs of the 17-bit load are hard-wired to 鈥?00鈥?. The MSB of the 14-bit value
is weighted at 6 dB so the value at all ones would be ~12 dB (increase in attenuation). This change happens immediately. Subsequent
changes due to crossing this threshold are held off by the delay in location IWA = 0*10, bits 31:24.
THRESHOLD 1.
Immediate threshold value. If the input magnitude is above this value, the attenuation control accumulator is adjusted by the amount
programmed in bits 29:16.
15:0
NOTES ON THRESHOLDS:
The input range is -32768 to 32767 (0x8000 to 0x7FFF)
The magnitude range is 0 to 32768 ( 0x0000 to 0x8000)
The immediate threshold is 0 to 65536 (0x0000 to 0xFFFF)
The magnitude must be greater than the immediate threshold to trigger.
The integration period is 2 to 2
16
.
The integrated magnitude range is 0x00000000 to 0x80000000
The normalization divider range is 2
1
to 2
16
, so with the maximum dividers:
The averaged output is 0x0000 to 0x8000
The upper and lower thresholds are 0 to 65536 (0x0000 to 0xFFFF)
To trigger the upper and lower comparisons:
The magnitude must be greater than the upper threshold.
The magnitude must be less than lower threshold.
44

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