ISL5416 Datasheet

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ISL5416

TABLE 51. CHANNEL RESET/SYNCIn1, SYNCIn2 CONTROL (IWA = *000h)

RESET STATE = 0x00000000h

(Continued)

P(31:0)

2

1

FUNCTION

AGC GAIN LOAD. Update/load AGC gain from the master/holding register to the slave/active

register on SYNCIn1.

CARRIER CENTER FREQUENCY UPDATE. Updates Carrier Center Frequency from the master/holding register to the

slave/active register on SYNCIn1.

0

DATA PATH UPDATE. Update channel processing control register (*001) on SYNCIn1.

The channel processing control register enables and

disables the major processing blocks in the channel. This

register is double buffered. On reset, the slave/active register

is cleared, disabling the processing in the channel. The

processing is enabled by updating the slave register with

either a write to location IWA *019h or by a SYNCIn signal, if

enabled (see IWA *000h).

TABLE 52. CHANNEL PROCESSING CONTROL (IWA = *001h)

RESET STATE = 0x00000000h

P(31:0)

31:29

FUNCTION

COF ENABLE. This is a serial carrier offser frequency control loaded through the DIN bus at the clock rate. The serial bits are shown

in table 53. MSB justified with unused LSBs zeroed. COF is shifted in one bit per clock, MSB first. COFSYNC is one-clock-wide,

active high pulse, asserted during the clock period before the first bit (MSB). The offset frequency is added to the center frequency

loaded by the

碌P.

The offset word is a 32-bit twos complement value.

0XX = disabled.

100 = 8 bits offset.

101 = 16 bits offset.

110 = 24 bits offset.

111 = 32 bits offset.

TABLE 53. COF and COFSYNC to DIN BIT

MAPPING

CHANNEL

0

1

2

3

28:23

22

RESERVED. Set to 0.

HOIF INTERPOLATE BY 1.

1 = Set this bit to enable HOIF in the IHBF/RESAMPLER block. This is provided to use the HOIF as a phase (time) shift with no rate

change.

AGC BYPASS.

1 = bypass AGC;

0 = AGC enabled.

AGC TIMER ENABLE.

1 = timing counters in the AGC are enabled.

0 = timing counters in the AGC are disabled.

Note: Counters must be enabled if one of the timed modes is selected in register IWA = *008h.

CHANNEL INPUT SELECT.

000 = disabled.

001 = uP test register (IWA = 0002h) used as an input, always enabled.

010 = uP test register used as an input, enabled by a strobe at IWA = 0003h.

011 = reserved.

100 = AIN.

101 = BIN.

110 = CIN.

111 = DIN.

COF

DIN16

DIN12

DIN8

DIN4

COFSYNC

DIN15

DIN11

DIN7

DIN3

21

20

19:17

48

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