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ADG715 Datasheet

  • ADG715

  • CMOS, Low Voltage Serially Controlled, Octal SPST Switches

  • 497.90KB

  • 17页

  • AD

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ADG714/ADG715
TERMINOLOGY
V
DD
V
SS
I
DD
I
SS
GND
S
D
R
ON
鈭哛
ON
R
FLAT(ON)
Most positive power supply potential.
Most negative power supply in a dual supply
application. In single supply applications, this
should be tied to ground.
Positive Supply Current.
Negative Supply Current.
Ground (0 V) Reference
Source Terminal. May be an input or output.
Drain Terminal. May be an input or output.
Ohmic resistance between D and S.
On-resistance match between any two channels,
i.e., R
ON
max鈥揜
ON
min.
Flatness is de铿乶ed as the difference between the
maximum and minimum value of on-resistance
as measured over the speci铿乪d analog signal range.
Source leakage current with the switch 鈥淥FF.鈥?/div>
Drain leakage current with the switch 鈥淥FF.鈥?/div>
Channel leakage current with the switch 鈥淥N.鈥?/div>
Analog voltage on terminals D and S.
鈥淥FF鈥?Switch Source Capacitance. Measured
with reference to ground.
鈥淥FF鈥?Switch Drain Capacitance. Measured
with reference to ground.
C
D
, C
S
(ON)
I
S
(OFF)
I
D
(OFF)
I
D
, I
S
(ON)
V
D
(V
S
)
C
S
(OFF)
C
D
(OFF)
鈥淥N鈥?Switch Capacitance. Measured with ref-
erence to ground.
C
IN
Digital Input Capacitance.
t
ON
Delay time between loading new data to the
shift register and selected switches switching on.
t
OFF
Delay time between loading new data to the
shift register and selected switches switching off.
Off Isolation A measure of unwanted signal coupling through
an 鈥淥FF鈥?switch.
Crosstalk
A measure of unwanted signal which is coupled
through from one channel to another as a result
of parasitic capacitance.
Charge
A measure of the glitch impulse transferred
Injection
from the digital input to the analog output
during switching.
Bandwidth
The frequency at which the output is attenuated
by 鈥? dBs.
On Response The frequency response of the 鈥淥N鈥?switch.
Insertion Loss The loss due to the ON resistance of the switch.
Insertion Loss = 20 log
10
(V
OUT
with switch/
V
OUT
without switch.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
(I
INH
)
Input current of the digital input.
I
DD
Positive Supply Current.
REV. 0
鈥?鈥?/div>

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