STAC9200 Datasheet

  • STAC9200

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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
5.4.7.
AFG PwrCap
Table 22. AFG PwrCap Command Verb Format
Verb ID
Get
F00
Payload
0F
Response
See bitfield table
Table 23. AFG PwrCap Command Response Format
Bit
[31.:4]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Reserved
Power State D3 is supported. Allows for lowest
possible power consuming state under software
control (and still properly respond to a
subsequent Power State command).
Power State D2 is supported. Allows for lowest
possible power consuming state from which it
can return to fully on state within 10 ms.
Power State D1 is supported. Allows for lowest
possible power consuming state from which it
can return to fully on state within 10 ms,
excepting analog pass-through circuits which
must remain fully on.
Power State D0 is supported. Node power state
is fully on.
Description
[3]
D3
R
0x1
[2]
D2
R
0x1
[1]
D1
R
0x1
[0]
D0
R
0x1
5.4.8.
AFG GPIOCap
Table 24. AFG GPIOCap Command Verb Format
Verb ID
Get
F00
Payload
11
Response
See bitfield table
IDT鈩?/div>
2-CHANNEL HIGH DEFINITION AUDIO CODEC
30
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06

STAC9200 产品属性

  • 0现货

  • 停产

  • -

  • 停产

  • LDMOS

  • -

  • 1.3GHz

  • 18dB

  • -

  • 1μA

  • -

  • -

  • 230W

  • 80 V

  • 底座安装

  • STAC244B

  • STAC244B

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