STAC9200 Datasheet

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STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 27. AFG OutAmpCap Command Response Format
Bit
[7]
[6.:0]
Bitfield Name
Rsvd1
Offset
RW
R
R
Reset
0x0
0x1F
Reserved
0dB-step is programmed with this offset
Description
5.4.10.
AFG PwrState
Table 28. AFG PwrState Command Verb Format
Verb ID
Get
Set1
F05
705
Payload
00
See bits [7:0] of bitfield table
Response
See bitfield table
0000_0000h
Table 29. AFG PwrState Command Response Format
Bit
[31.:8]
[7.:4]
[3.:2]
Bitfield Name
Rsvd2
Act
Rsvd1
RW
R
R
R
Reset
0x0
0x2
0x0
Reserved
PS-Act: Actual power state of referenced node.
Reserved
PS-Set: Current power setting of referenced node.
0: All Powered-On
1: D1 => PR0, PR1
2: D2 => PR0, PR1, PR2, PR6, EAPD
3: D3 => PR6, PR5, PR3, PR2, PR1, PR0, EAPD
Note: PR4 is not mapped in Azalia
Description
[1.:0]
Set
RW
0x2
5.4.11.
AFG UnsolResp
Table 30. AFG UnsolResp Command Verb Format
Verb ID
Get
Set1
F08
708
Payload
00
See bits [7:0] of bitfield table
Response
See bitfield table
0000_0000h
IDT鈩?/div>
2-CHANNEL HIGH DEFINITION AUDIO CODEC
32
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06

STAC9200 产品属性

  • 0现货

  • 停产

  • -

  • 停产

  • LDMOS

  • -

  • 1.3GHz

  • 18dB

  • -

  • 1μA

  • -

  • -

  • 230W

  • 80 V

  • 底座安装

  • STAC244B

  • STAC244B

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