STAC9200/9200D
2-CHANNEL HIGH DEFINITION AUDIO CODEC
PC AUDIO
Table 33. AFG GPIO Command Response Format
Bit
Bitfield Name
RW
Reset
Description
Data for GPIO1 (Pin 34). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
Data for GPIO0 (Pin 33). If this GPIO bit is
configured as Sticky (edge-sensitive) input, it
can be cleared by writing zero (one) here when
the corresponding Polarity Control bit is zero
(one).
[1]
Data1
RW
0x0
[0]
Data0
RW
0x0
5.4.13.
AFG GPIOEn
Table 34. AFG GPIOEn Command Verb Format
Verb ID
Get
Set1
F16
716
Payload
00
See bits [7:0] of bitfield table
Response
See bitfield table
0000_0000h
Table 35. AFG GPIOEn Command Response Format
Bit
[31.:4]
Bitfield Name
Rsvd
RW
R
Reset
0x0
Reserved
Enable for GPIO3:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO2:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO1:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Enable for GPIO0:
0= pin is disabled (Hi-Z state);
1= pin is enabled; behavior determined by
GPIO Direction control
Description
[3]
Mask3
RW
0x0
[2]
Mask2
RW
0x0
[1]
Mask1
RW
0x0
[0]
Mask0
RW
0x0
IDT鈩?/div>
2-CHANNEL HIGH DEFINITION AUDIO CODEC
34
IDT CONFIDENTIAL
STAC9200/9200D
V 1.4 12/06
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