W79E532/W79L532
Instruction Fetch
C1
C2
C3
C4
Operand Fetch
C1
C2
C3
C4
Operand Fetch
C1
C2
C3
C4
Operand Fetch
C1
C2
C3
C4
Operand Fetch
C1
C2
C3
C4
CLK
ALE
PSEN
AD7-0
A7-0
OP-CODE
A7-0
OPERAND
A7-0
OPERAND
A7-0
OPERAND
A7-0
OPERAND
PORT 2
Address A15-8
Address A15-8
Address A15-8
Address A15-8
Address A15-8
Figure 7. Five Cycle Instruction Timing
8.1.1
External Data Memory Access Timing
The timing for the MOVX instruction is another feature of the W79E(L)532. In the standard 8032, the
MOVX instruction has a fixed execution time of 2 machine cycles. However in the W79E(L)532, the
duration of the access can be varied by the user.
The instruction starts off as a normal op-code fetch of 4 clocks. In the next machine cycle, the
W79E(L)532 puts out the address of the external Data Memory and the actual access occurs here.
The user can change the duration of this access time by setting the STRETCH value. The Clock
Control SFR (CKCON) has three bits that control the stretch value. These three bits are M2-0 (bits 2-0
of CKCON). These three bits give the user 8 different access time options. The stretch can be varied
from 0 to 7, resulting in MOVX instructions that last from 2 to 9 machine cycles in length. Note that the
stretching of the instruction only results in the elongation of the MOVX instruction, as if the state of the
CPU was held for the desired period. There is no effect on any other instruction or its timing. By
default, the Stretch value is set at 1, giving a MOVX instruction of 3 machine cycles. If desired by the
user the stretch value can be set to 0 to give the fastest MOVX instruction of only 2 machine cycles.
Table 4. Data Memory Cycle Stretch Values
RD
OR
WR
M2
M1
M0
MACHINE
CYCLES
STROBE
WIDTH
IN CLOCKS
RD
OR
WR
STROBE
WIDTH
@ 25 MHZ
RD
OR
WR
STROBE
WIDTH
@ 40 MHZ
0
0
0
0
0
1
0
1
0
2
3 (default)
4
2
4
8
80 nS
160 nS
320 nS
50 nS
100 nS
200 nS
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Publication Release Date: November 21, 2005
Revision A5